Investigation in 1-Bit Quantized Receiver Signal Processing

Type of work:

Master thesis

Assignment:

• Research about fundamental modules and components used on the transmitter and receiver sides of a digital communication system.
• Research about 1-bit quantization
• Implementation of the communication chain in MATLAB
• Implementation of the receiver in hardware.
• Possible hardware implementation of the modulation and demodulation
• Testing and evaluating the performance of the system
• Writing thesis report consisting of implementation, results, and conclusion.

Skills:

• Basic understanding of digital communication systems and digital signal processing
• Linux on ARM
• MATLAB/Octave
• Verilog/VHDL

Background:

Future wireless communication systems beyond 5G will use bandwidths above 100GHz, but the high power consumption of analog-to-digital converters (ADCs) at these frequencies is a major challenge. In this thesis project, a novel sub-terahertz system is studied to address this challenge,  shifting resolution from amplitude to the time domain by reducing amplitude resolution and using temporal oversampling relative to the Nyquist rate for greater energy efficiency. The system employs zero crossing modulation (ZXM) with 1-bit quantization and temporal oversampling at the receiver. New finite-state machines are developed and evaluated for efficient modulation and demodulation of ZXM signals.

Supervisor:

Dr. C. Weis

Student:

Student: Deniz Özdemir

Year:

2023