Building/Room: 12-526

Tel:  (+49) (631) 205-2608

Fax: (+49) (631) 205-4782

Email

Research

The main goal of my research activities is to guarantee the safety of HW/SW-Systems like embedded systems
by employing formal methods.

HW in this context is the CPU core executing the SW which is low-level software (e.g. firmware).

Related Keywords are:
Safety Analysis, Fault Injection,
In-Field Testing, Online-Checking,
Automated test pattern generation

Previous Courses

• Architecture of digital Systems1 Exercise
• Architecture of digital Systems1 Class Project

Publications

• Christian Bartsch, Stephan Wilhelm, Daniel Kästner, Dominik Stoffel and Wolfgang Kunz: ”Combining Fault Effect Analysis and Fault Propagation Analysis to Determine Source-Level Effects of Hardware Faults”, Embedded World, Juni 2022.
   
• Christian Bartsch, Stephan Wilhelm, Daniel Kästner, Dominik Stoffel and Wolfgang Kunz: ”Compositional Fault Propagation Analysis in Embedded Systems Using Abstract Interpretation”, IEEE International Test Conference (ITC), October 2021.
   
• C. Bartsch, C. Villarraga, D. Stoffel, and W. Kunz, “A HW/SW Cross-Layer Approach for Determining Application-Redundant Hardware Faults in Embedded Systems,” Journal of Electronic Testing (JETTA), vol. 33, no. 1, pp. 77 – 92, Feb 2017. [link]
   
• C. Bartsch, C. Villarraga, D. Stoffel, W. Kunz: A HW-dependent Software Model for Cross-Layer Fault Analysis in Embedded Systems, IEEE Latin-American Test Symposium (LATS-2016), Brazil, 2016.
   
• C. Bartsch, C. Villarraga, D. Stoffel, W. Kunz: A HW-dependent Software Model for Cross-Layer Fault Analysis in Embedded Systems, 9. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Freiburg, 2016.
   
• C. Bartsch, C Villarraga, D. Stoffel, W. Kunz: Safety Across the HW/SW Interface – Can Formal Methods Meet the Challenge? International Symposium on Integrated Circuits (ISIC-2016), Singapore, 2016.
   
• C. Bartsch, N. Roedel, C. Villarraga, D. Stoffel, and W. Kunz, “A hw-dependent software model for cross-layer fault analysis in embedded systems,” in International Workshop on Resiliency in Embedded Electronic Systems, November  2015.
   
• C. Villarraga, B. Schmidt, B. Bao, R. Raman, C. Bartsch, T. Fehmel, D. Stoffel, W. Kunz. "Software in a Hardware View: New Models for HW-dependent Software in SoC Verification and Test" (Invited Paper) Proc. International Test Conference (ITC'14), 2014. Seattle, USA.
   
• C. Bartsch, C. Villarraga, B. Schmidt, D. Stoffel, W. Kunz. "Efficient SAT/Simulation-based model generation for low-level embedded software" 17. GI/ITG/GMM Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen MBMV), 2014, 147-157. Boeblingen, Germany.
   
• C. Villarraga, B. Schmidt, C. Bartsch, J. Bormann, D. Stoffel, and W. Kunz: "A New SAT-Based Approach for Equivalence Checking of Hardware-Dependent Low-Level Embedded System Software". 50th Design Automation Conference (DAC 2013) Work-In-Progress (WIP), Austin (Texas), June 2013.
   
• C. Villarraga, B. Schmidt, C. Bartsch, J. Bormann, D. Stoffel, and W. Kunz: "An Equivalence Checker for Hardware-Dependent Embedded System Software",  Eleventh ACM-IEEE International Conference on  Formal Methods and Models for Codesign (MEMOCODE), Portland (Oregon), USA, October 2013