Research
Our research contributes to achieving functional safety and security of microelectronic systems including processor cores and Systems-on-Chip. The requirement for functional safety and security is driven by an increased use of microelectronic systems in safety- and security-critical applications.
Currently, our research focuses on the following topics:
- Detection of security vulnerabilities in hardware and at the hardware/software interface through exhaustive formal methods
- Design and implementation of security features in hardware and at the hardware/software interface with focus on transient execution side channels and timing attacks
- Correct-by-construction embedded system design using “property-first design"
Our research is currently funded byBMBF, Cyberagentur, DFG, Intel and Siemens EDA and is part of the following consortial projects.
The BMBF project ZuSE-Scale4Edge project focuses on enhancing the development and trustworthiness of edge computing processors, primarily leveraging the open-source RISC-V architecture. Its key goals are to create a scalable ecosystem for edge devices, addressing security, functional safety, and optimization for specific applications like smart sensors and automotive systems.
The BMBF project DI-EDAI focuses on enhancing the capabilities of AI chips, particularly emphasizing security, energy efficiency, and trustworthiness. The project involves designing modern AI accelerators with a focus on close collaboration between AI models and hardware architecture, and ultimately providing an automated, streamlined design methodology from software to hardware.
The DFG Priority Program “Nano Security” focuses on addressing security challenges emerging from nano-electronic technologies and advanced semiconductor components. This initiative explores the vulnerabilities of electronic systems while seeking to establish
robust security mechanisms at the hardware level. It promotes cross-disciplinary collaboration to devise innovative solutions for securing future computing systems.
The Secure Processor Assurance and Resilience program by Intel Labs is part of Intel's broader initiatives to enhance the security, resiliency, and trustworthiness of its hardware. This project focuses on addressing security challenges that span the entire lifecycle of computing platforms. This involves research and innovations that improve hardware security assurance from the design phase through to a product's operational lifespan and eventual decommissioning.
Selected Publications
M.R. Fadiheh, A. Wezel, J. Müller, J. Bormann, S. Ray, J. Fung, S. Mitra, D. Stoffel, W. Kunz:
An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors.
In IEEE Transactions on Computers, Jan. 2023
Selected for „Top Picks in Hardware and Embedded Security” by an IEEE jury
L. Deutschmann, J. Müller, M.R. Fadiheh, D. Stoffel, W. Kunz:
Towards a formally verified hardware root-of-trust for data-oblivious computing.
In Proceedings of the 59th ACM/IEEE Design Automation Conference (DAC '22), July 2022
Best Paper Award
J. Müller, M.R. Fadiheh, A.L. Duque Antón, T. Eisenbarth, D. Stoffel, W. Kunz:
A Formal Approach to Confidentiality Verification in SoCs at the Register Transfer Level.
In Proceedings of the 58th ACM/IEEE Design Automation Conference (DAC '21), Dec. 2021
Winner of the 2022 Intel Hardware Security Academic Award