LEHRSTUHL FÜR ENTWURF INFORMATIONSTECHNISCHER SYSTEME
CHAIR OF ELECTRONIC DESIGN AUTOMATION
Upcoming Exams SS2025
Examination: Architecture of Digital Systems I - SS2025
Exam Dates: | Mon Wed | 2025-07-21 2025-09-17 |
Examination: Architecture of Digital Systems II - SS2025
Exam Dates: | Tue Thu | 2025-07-22 2025-09-18 |
Examination: Verification of Digital Systems - SS2025
Exam Dates: | Tue Thu | 2025-07-22 2025-09-18 |
Examination: Robust Digital Systems - SS2025
Exam Dates: | Thu Wed | 2025-07-31 2025-09-24 |
NEWS
Best Presentation Award - DVCON Europe 2024

Our collaborative paper with LUBIS EDA titled "Formal RTL Sign-Off with Abstract Models" was voted by the attendees
for the "Best Presentation Award" at DVCON Europe 2024.
The picture shows the two main authors Lucas Deutschmann (left) and Osama Ayoub (right).
Hot Pick in Security

Our paper (jointly with Intel, Siemens EDA and Stanford University) in IEEE Transactions on Computers titled “An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors” has been selected by an IEEE jury as a “Hot Pick in Security”.
Take a look into the paper here.