LEHRSTUHL FÜR ENTWURF INFORMATIONSTECHNISCHER SYSTEME
CHAIR OF ELECTRONIC DESIGN AUTOMATION

Welcome to our website!

On these pages you find information about us [People], our research  [Research] and our teaching [Teaching]. If you are a student, the below announcements will help you at the beginning of the semester to quickly access all needed information regarding upcoming courses.

Lecture Announcements SS 2025

Grundlagen der Informationsverarbeitung

EIT-EIS-314-V-2
Dienstag
Mittwoch
15:45 - 17:15
12:15 - 13:45
24-102
46-210


Umfang:
Vorlesung (3 SWS) mit Übung und Tutorien (1 SWS)
die Aufteilung in Vorlesung, Übung und Tutorien wird in der Vorlesung bekannt gegeben.

(Freitag 14:00 - 15:30 Uhr, Hörsaal 13-305, dient in seltenen Fällen als Ausweichtermin)

Start: Mittwoch, 23. April, 2025

Embedded Systems Laboratory (SS)

EIT-EIS-521-L-7 (SS)
(Labor Digitaltechnik II)
Wednesday14:00 - 17:00Room: 12-524

4 hours of laboratory (5 ECTS credits)

Start: 
Introductory meeting on Wed, 2025-04-23   15:45h, Room 11-262.
Attendance to introductory meeting is required to claim seat.

Advance online registration is mandatory for this lab.
Seats are assigned on a first-come first-serve basis. 
The course is offered both in the winter and in the summer semester.

Synthesis and Optimization of Microelectronic Systems II

EIT-EIS-660-V-7
Monday
Thursday
08:15 - 09:45
15:45 - 17:15
11-262
11-262

Start: Thursday, May 22, 2025

Robust Digital Systems

EIT-EIS-566-V-7
Thursday12:15 - 13:4513-222

2 hours of lecture (3 ECTS credits)

Start: Thursday, April 24, 2025

NEWS

Best Presentation Award - DVCON Europe 2024

Our collaborative paper with LUBIS EDA titled "Formal RTL Sign-Off with Abstract Models" was voted by the attendees
for the "Best Presentation Award" at DVCON Europe 2024.

The picture shows the two main authors Lucas Deutschmann (left) and Osama Ayoub (right).

Hot Pick in Security

Our paper (jointly with Intel, Siemens EDA and Stanford University) in IEEE Transactions on Computers titled “An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors” has been selected by an IEEE jury as a “Hot Pick in Security”.

 

Take a look into the paper here.