LEHRSTUHL FÜR ENTWURF INFORMATIONSTECHNISCHER SYSTEME
CHAIR OF ELECTRONIC DESIGN AUTOMATION
Lecture Announcements WS 2025/26
Verification of Digital Systems
Course:
EIT-EIS-560-V-4
Additional class project (optional):
EIT-EIS-562-M-7
| Tuesday Thursday | 14:00 - 15:30 14:45 - 16:15 | Room: 11-207 Room: 24-102 |
2 hours of lecture / 2 hours of assignments (5 ECTS credits) plus 3 ECTS class project (optional)
Start: Thursday, October 23, 2025
Architecture of Digital Systems I
Course:
EIT-EIS-571-V-4
Additional class project (optional):
EIT-EIS-572-M-7
| Thursday Friday | 12:15 - 13:45 12:15 - 13:45 | Room: 11-243 Room: 46-210 |
2 hours of lecture / 1 hour of assignments (4 ECTS credits) plus 3 ECTS class project (optional)
Start: Friday, October 24, 2025
Architecture of Digital Systems II
EIT-EIS-573-V-4
| Wednesday Thursday | 14:00 - 15:30 16:30 - 18:00 | Room: 11-262 Room: 48-210 |
2 hours of lecture / 1 hour of assignments
Start: Wednesday, October 22, 2025.
(No class on Thursday, 2025-10-23.)
Embedded Systems Laboratory (WS)
EIT-EIS-521-L-7 (WS)
(Labor Digitaltechnik II)
| Wednesday | 14:00 - 17:00 | Room: 12-524 |
4 hours of laboratory (5 ECTS credits)
Course starts Thu, 2025-10-23, 16:30, Room: 48-210:
Introductory meeting. (No lab on Wed, 2025-10-22.)
Advance online registration is mandatory for this lab.
Seats are assigned on a first-come first-serve basis.
Attendance to introductory meeting is required to claim seat.
NEWS
Best Presentation Award - DVCON Europe 2024
Our collaborative paper with LUBIS EDA titled "Formal RTL Sign-Off with Abstract Models" was voted by the attendees
for the "Best Presentation Award" at DVCON Europe 2024.
The picture shows the two main authors Lucas Deutschmann (left) and Osama Ayoub (right).
Hot Pick in Security
Our paper (jointly with Intel, Siemens EDA and Stanford University) in IEEE Transactions on Computers titled “An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors” has been selected by an IEEE jury as a “Hot Pick in Security”.
Take a look into the paper here.