LEHRSTUHL FÜR ENTWURF INFORMATIONSTECHNISCHER SYSTEME
CHAIR OF ELECTRONIC DESIGN AUTOMATION
Lecture Announcements SS 2026
Grundlagen der Informationsverarbeitung
EIT-EIS-314-V-2
| Dienstag Mittwoch | 15:45 - 17:15 12:15 - 13:45 | 24-102 46-210 |
Umfang:
Vorlesung (3 SWS) mit Übung und Tutorien (1 SWS)
die Aufteilung in Vorlesung, Übung und Tutorien wird in der Vorlesung bekannt gegeben.
(Freitag 14:00 - 15:30 Uhr, Hörsaal 13-305, dient in seltenen Fällen als Ausweichtermin)
Start: Dienstag, 14. April, 2026
Embedded Systems Laboratory (SS)
EIT-EIS-521-L-7 (SS)
(Labor Digitaltechnik II)
| Wednesday | 14:00 - 17:00 | Room: 12-524 |
4 hours of laboratory (5 ECTS credits)
Start:
Introductory meeting: Wed, 2026-04-15, 14:00-15:30, Room: 13-222.
Attendance to introductory meeting is required to claim seat.
Advance online registration is mandatory for this lab.
Seats are assigned on a first-come first-serve basis.
The course is offered both in the winter and in the summer semester.
Architecture of Digital Systems I Summer Semester
Course:
EIT-EIS-571-V-4
Additional class project (optional):
EIT-EIS-572-M-7
| Monday Thursday | 14:00 - 15:30 12:15 - 13:45 | Room: 11-262 Room: 11-241 |
2 hours of lecture / 1 hour of assignments (4 ECTS credits) plus 3 ECTS class project (optional)
Start: Thursday, April 16, 2026
Synthesis and Optimization of Microelectronic Systems II
EIT-EIS-660-V-7
| Monday Thursday | 08:15 - 09:45 15:45 - 17:15 | 11-262 11-262 |
Start: Monday, May 18, 2026
Robust Digital Systems
EIT-EIS-566-V-7
| Thursday | 12:15 - 13:45 | 13-222 |
2 hours of lecture (3 ECTS credits)
Start: Thursday, April 16, 2026
NEWS
Best Presentation Award - DVCON Europe 2024
Our collaborative paper with LUBIS EDA titled "Formal RTL Sign-Off with Abstract Models" was voted by the attendees
for the "Best Presentation Award" at DVCON Europe 2024.
The picture shows the two main authors Lucas Deutschmann (left) and Osama Ayoub (right).
Hot Pick in Security
Our paper (jointly with Intel, Siemens EDA and Stanford University) in IEEE Transactions on Computers titled “An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors” has been selected by an IEEE jury as a “Hot Pick in Security”.
Take a look into the paper here.