Room: 12/545

Tel: (+49) (631) 205-2685

E-Mail: lucas.deutschmann(at)rptu.de

GitHub: https://github.com/Seek64

Courses & Tasks:

• Verification of Digital Systems Class Project (VDSCP)
• Administration of ElBulbo (https://bordeaux.eit.uni-kl.de/elbulbo/login.php )

Research:

I am currently researching in the field of hardware security with a focus on conventional side channels. My main focus lies in using formal verification to certify hardware primitives for data-oblivious computing.
Previous research covered:

• Generating RTL designs from untimed SystemC models (Operation-Level Synthesis)
• Fault-Injection based Analysis for identifying Resource sharing Opportunities
• Exploiting Formal Verification to improve Lockstep Architectures

Publications:

• L. Deutschmann, J. Müller, M. R. Fadiheh, D. Stoffel, and W. Kunz, “Towards a Formally Verified Hardware Root-of-Trust for Data-Oblivious Computing”, 59th IEEE/ACM Design Automation Conference (DAC'22), San Francisco, July 2022. (Best Paper Award )
• L. Deutschmann, J. Schauss, T. Ludwig, D. Stoffel, W. Kunz: Operation-Level Synthesis, 24. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV'21), Virtual Event, Germany, March 2021.
• T. Ludwig, M. Schwarz, J. Urdahl, L. Deutschmann, S. Hetalani, D. Stoffel, W. Kunz: Property-Driven Development of a RISC-V CPU, Design and Verification Conference US (DVCON US), San Jose, CA, Feb. 2019.

Notable Presentations:

• L. Deutschmann, J. Müller, M. R. Fadiheh, D. Stoffel, and W. Kunz, “Towards a Formally Verified Hardware Root-of-Trust for Secure Computing Systems”, Robust Systems All-Day Mini Symposium, Stanford University, July 2022.
• L. Deutschmann, J. Müller, M. R. Fadiheh, D. Stoffel, and W. Kunz, “Towards a Formally Verified Hardware Root-of-Trust for Data-Oblivious Computing”, Intel Scalable Assurance Workshop 2022, Portland, OR, September 2022.