Fachgebiet Entwurf Informationstechnischer Systeme (EIS)

M.Sc. Lucas Deutschmann

Room: 12/545

Tel: (+49) (631) 205-2685

E-Mail: lucas.deutschmann(at)rptu.de

GitHub: https://github.com/Seek64

 

Courses & Tasks:

 

Research:

I am currently researching in the field of hardware security with a focus on conventional side channels. My main focus lies in using formal verification to certify hardware primitives for data-oblivious computing.
Previous research covered:

  • Generating RTL designs from untimed SystemC models (Operation-Level Synthesis)
  • Fault-Injection based Analysis for identifying Resource sharing Opportunities
  • Exploiting Formal Verification to improve Lockstep Architectures

 

Publications:

  • L. Deutschmann, J. Müller, M. R. Fadiheh, D. Stoffel, and W. Kunz, “A Scalable Formal Verification Methodology for Data-Oblivious Hardware”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024 (Early Access)
     
  • A. Duque Antón, J. Müller, P. Schmitz, T. Jauch, A. Wezel, L. Deutschmann, M. R. Fadiheh, D. Stoffel, and W. Kunz, “VeriCHERI: Exhaustive Formal Security Verification of CHERI at the RTL”, ACM/IEEE International Conference on Computer Aided Design (ICCAD'24), 2024 (to be published)
     
  • M. Zonta, A. Meza, N. Hinderling, L. Deutschmann, F. Restuccia, R. Kastner, and S. Shinde, “eXpect: On the Security Implications of Violations in AXI Implementations”, ACM/IEEE International Conference on Computer Aided Design (ICCAD'24), 2024 (to be published)
     
  • J. Müller, A. Duque Antón, L. Deutschmann, D. Mehmedagić, C. Rodrigues, D. Oliveira, K. Devarajegowda, M. R. Fadiheh, S. Pinto, D. Stoffel, and W. Kunz, “MCU-Wide Timing Side Channels and Their Detection”, 61th IEEE/ACM Design Automation Conference (DAC'24), San Francisco, June 2024
     
  • A. Wezel, L. Deutschmann, T. Jauch, D. Mehmedagić, J. Müller, M. Ali, A. Duque Antón, P. Schmitz, M. R. Fadiheh, D. Stoffel, and W. Kunz, "Unique Program Execution Checking: Formal Security Guarantees for RISC-V Systems", RISC-V Summit Europe, Munich, June 2024
     
  • A. Duque Antón, J. Müller, L. Deutschmann, M. R. Fadiheh, D. Stoffel, and W. Kunz, “A Golden-Free Formal Method for Trojan Detection in Non-Interfering Accelerators”, Design, Automation & Test in Europe Conference and Exhibition (DATE'24), Valencia, April 2024
     
  • L. Deutschmann, Y. Kazhalawi, J. Seckinger, A. Duque Antón, J. Müller, M.R. Fadiheh, D. Stoffel, and W. Kunz, “Data-Oblivious and Performant: On Designing Security-Conscious Hardware”,  25th IEEE Latin American Test Symposium (LATS'24), 2024
     
  • L. Deutschmann, J. Müller, M. R. Fadiheh, D. Stoffel, and W. Kunz, “Formal Verification of Data-Obliviousness in Hardware”, 26. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV'23), Freiburg, March 2023
     
  • L. Deutschmann, J. Müller, M. R. Fadiheh, D. Stoffel, and W. Kunz, “Towards a Formally Verified Hardware Root-of-Trust for Data-Oblivious Computing”, 59th IEEE/ACM Design Automation Conference (DAC'22), San Francisco, July 2022. (Best Paper Award )
     
  • L. Deutschmann, J. Schauss, T. Ludwig, D. Stoffel, W. Kunz: Operation-Level Synthesis, 24. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV'21), Virtual Event, Germany, March 2021.
     
  • T. Ludwig, M. Schwarz, J. Urdahl, L. Deutschmann, S. Hetalani, D. Stoffel, W. Kunz: Property-Driven Development of a RISC-V CPU, Design and Verification Conference US (DVCON US), San Jose, CA, Feb. 2019.

 

Notable Presentations:

  • L. Deutschmann, J. Müller, M. R. Fadiheh, D. Stoffel, and W. Kunz, “A Scalable Formal Verification Methodology for Data-Oblivious Hardware”, Intel Scalable Assurance Workshop 2023, Portland, OR, September 2023.
  • L. Deutschmann, J. Müller, M. R. Fadiheh, D. Stoffel, and W. Kunz, “Towards a Formally Verified Hardware Root-of-Trust for Secure Computing Systems”, Robust Systems All-Day Mini Symposium, Stanford University, July 2022.
  • L. Deutschmann, J. Müller, M. R. Fadiheh, D. Stoffel, and W. Kunz, “Towards a Formally Verified Hardware Root-of-Trust for Data-Oblivious Computing”, Intel Scalable Assurance Workshop 2022, Portland, OR, September 2022.