HW/SW Cross-Layer Saftey Analysis
![](/fileadmin/_processed_/0/1/csm_IMG_2065_b619448b61.jpg)
Contact: Christian Bartsch
Modern manufacturing technologies for semiconductor devices achieve shrinking feature sizes at the cost of HW reliability. As a result, modern hardware is highly susceptible to different kinds of defect sources like electromigration, hot electrons, cross-talking or aging. The resulting defects can lead to a faulty behaviour of a hardware/software-system (HW/SW-system) and may jeopardize the overall safety of a system. This is a big challenge in many future applications of embedded systems (autonomous driving, smart factories).
In this research area we want to understand which faults may or may not lead to a faulty I/O behaviour. We want to use this knowledge to develop highly efficient fault detection methods that can be active during normal execution of the system without degrading its performance.
Check out:
- our paper on HW/SW Cross-Layer Safety Analysis in Jetta for which we received the Best Paper Award in 2018