
Among the awardees was Hiandra Fonseca Tomasi, honored for her master’s thesis titled “Custom Processor Instructions for SHA3 on RISC-V Architecture

Among the awardees was Hiandra Fonseca Tomasi, honored for her master’s thesis titled “Custom Processor Instructions for SHA3 on RISC-V Architecture

Best Paper Award at the 2025 IEEE 28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) for the paper,…