2024

Addressing the Combined Effect of Transistor and Interconnect Aging in SRAM towards Silicon Lifecycle Management
Z. Zhang, M. Mayahinia, C. Weis, N. Wehn, M. Tahoori, S. Nassif, G. Tshagharyan, G. Harutyunyan, Y. Zorian. IEEE VLSI Test Symposium, April, 2024, Tempe, AZ, USA.

Radar Backscattering Sensitivity to Oil Emulsions Using Spectral Analysis from Nadir-Aerial Response Systems
B. Hammoud, N. Wehn. IEEE International Geoscience and Remote Sensing Symposium (IGARSS), July, 2024, Athens, Greece.

FPGA Onboard Processing of Tiny-ML Models Using Radar-Sensing for Oil Spill Monitoring
B. Hammoud, J. Ney, Ch. Bou Maroun, N. Wehn. IEEE International Geoscience and Remote Sensing Symposium (IGARSS), July, 2024, Athens, Greece.

Detection of Oil Emulsification Using Drone-based Radar Sensing
B. Hammoud, N. Wehn. IEEE International Geoscience and Remote Sensing Symposium (IGARSS), July, 2024, Athens, Greece.

Error Detection and Correction Codes for Safe In-Memory Computations
L. Parrini, T. Soliman, B.Hettwer, M.J. Borman, S. Singh, A. Bende, V. Rana, F. Merchant, N. Wehn. 29th IEEE European Test Symposium, May 2024, Hague, Netherlands.

Novel Adaptive Quantization Methodology for 8-bit Floating-Point DNN Training
M. H. Sadi, C. Sudarshan, N. Wehn. Springer Journal on Design Automation for Embedded Systems

Physical Layer Forward Error Correction for Free-Space Optical Links
O. Griebel, A. Sauter, U. Wasenmüller, L. Steiner, J. Poliak, B. Matuz, N. Wehn. SPIE Photonics West, Free-Space Laser Communications XXXVI, Januar 2024, San Francisco, Californien, USA.

Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications
J. Ney, P. Matalla, V. Lauinger, L. Schmalen, S. Randel, N. Wehn. International Conference on Machine Learning for Communications and Networking (ICMLCN), May, 2024, Stockholm, Sweden.

Fully-blind Neural Network Based Equalization for Severe Nonlinear Distortions in 112 Gbit/s Passive Optical Networks
V. Lauinger, P. Matalla, J. Ney, N. Wehn, S. Randel, L. Schmalen.  Optical Fiber Communication Conference (OFC), March, 2024, San Diego, California, USA.

A Mapping of Triangular Block Interleavers to DRAM for Optical Satellite Communication
L. Steiner, T. Lehnigk-Emden, M. Fehrenz, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2024, Valencia, Spain.

Timing Analysis beyond Complementary CMOS Logic Styles
J. Lappas, A. Riahi, C. Weis, N. Wehn, S. Nassif. 29th Asia and South Pacific Design Automation Conference (ASP-DAC), Januar, 2024, Incheon Songdo , South Korea.

2023

First demonstration of in-memory computing crossbar using multi-level Cell FeFET
T. Soliman, S. Chatterjee, N. Laleni, F. Müller, T. Kirchner, N. Wehn, T. Kämpfe, Y. Chauhan, H. Amrouch. Nature Communications, October, 2023.
DOI

A Precise Measurement Platform for LPDDR4 Memories
J. Feldmann, L. Steiner, D. Christ, T. Psota, M. Jung, N. Wehn. ACM International Symposium on Memory Systems (MEMSYS 2023), October, 2023, Alexandria, VA, USA.

The NWRD Dataset: An Open-Source Annotated Segmentation Dataset of Diseased Wheat Crop
H. Anwar, S.U. Khan, M. M. Ghaffar, M. Fayyaz, M.J. Khan,  C. Weis, N. Wehn, F. Shafait. Sensors, Special Issue: Deep Learning for Semantic Segmentation and Explainable AI Based on Sensing Technology,  August, 2023.

Successive Cancellation Automorphism List Decoding of Polar Codes
L. Johannsen, C. Kestel, M. Geiselhart, T. Vogt, S. ten Brink, N. Wehn. International Symposium on Topics in Coding 2023 (ISTC 2023), September, 2023, Brest, France.

Energy-Efficient Decoding of Spatially Coupled Low-Density Parity-Check Codes using Adaptive Window Sizes
O. Griebel, M. Herrmann, B. Hammoud, N. Wehn. International Symposium on Topics in Coding 2023 (ISTC 2023), September, 2023, Brest, France.

Vers un traitement en bande de base des communications sans fil de l`ordre du Tbits/s
M. Herrmann, N. Wehn. ISTE Group, System multiprocesseurs sur puce 2, Applications, pp. 53

A learning-based approach for single event transient analysis in pass transistor logic
Z. Zhang, Z. Wu, C. Weis, N. Wehn, M. Tahoori. 29th IEEE International Symposium on On-Line Testing and Robust System Design, June, 2023, Chania, Crete (Greece).

From Algorithm to Implementation: Enabling High-Throughput CNN-based Equalization on FPGA for Optical Communications
J. Ney, C. Füllner, V. Lauinger, L. Schmalen, S. Randel, N. Wehn. International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XXIII), July, 2023, Samos Island, Greece.
Best Paper Award

Unsupervised ANN-Based Equalizer and Its Trainable FPGA Implementation
J. Ney, V. Lauinger, L. Schmalen, N. Wehn. Joint European Conference on Networks and Communications & 6G Summit (EuCNC/6G Summit), June, 2023, Gothenburg, Sweden.

A Novel Iterative Estimation Technique using Radar Sensing to Remotely Characterize Oil Slicks during Spills
B. Hammoud, N. Wehn. IEEE International Geoscience and Remote Sensing Symposium (IGARSS), July, 2023, Pasadena, California, USA.

Oil Spill Detection in Calm Ocean Conditions: A U-net Model Novel Solution 
B. Hammoud, C. Maroun, M. Moursi, N. Wehn. IEEE International Geoscience and Remote Sensing Symposium (IGARSS), July, 2023, Pasadena, California, USA.

Design-Space Exploration for Remote-Sensing (Part I): A Methodical System-Level Approach
B. Hammoud, L. Steiner, N. Wehn. IEEE RADIO International Conference (RADIO), May, 2023, Balaclava.

Design-Space Exploration for Remote-Sensing (Part II): Microwave Radar Imaging from UAVs for Oil Spill Monitoring
B. Hammoud, L. Steiner, N. Wehn. IEEE RADIO International Conference (RADIO), May, 2023, Balaclava.

A New Method for Predictive Checkpointing in Transiently-Powered IoT Sensor Devices with Thermal Energy Harvesting
C. Rheinländer, F. Lauer, N. Wehn. IEEE SusTech 2023 Conference, April, 2023, Portland, OR, USA.

Ensemble Belief Propagation Decoding for Short Linear Block Codes
K. Kraft, M. Herrmann, O. Griebel, N. Wehn. International ITG 26th Workshop on Smart Antennas and 13th Conference on Systems, Communications, and Coding (WSA&SCC 2023), March, 2023, Braunschweig, Germany.

Automorphism Ensemble Polar Code Decoders for 6G URLLC
C. Kestel, M. Geiselhart, L. Johannsen, S. ten Brink, N. Wehn. International ITG 26th Workshop on Smart Antennas and 13th Conference on Systems, Communications, and Coding (WSA&SCC 2023), March, 2023, Braunschweig, Germany.

ZuSE-KI-AVF: Application-Specific AI Processor for Intelligent Sensor Signal Processing in Autonomous Driving
G. B. Thieu, S. Gesper, G. Payá-Vayá, C. Riggers, O. Renke, T. Fiedler, J. Marten, T. Stuckenberg, H. Blume, C. Weis, L. Steiner, C. Sudarshan, N. Wehn, L. M. Reimann, R. Leupers, M. Beyer, D. Köhler, A. Jauch, J. M. Borrmann, S. Jaberansari, T. Berthold, M. Blawat, M. Kock, G. Schewior, J. Benndorf, F. Kautz, H.-M. Bluethgen, C. Sauer. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2023, Antwerp, Belgium.

SmaEPho–Smart Photometry in Education 4.0
L. Geuer, F. Lauer, J. Kuhn, N. Wehn, R. Ulber. Education Sciences, Special Issue "Digital Twins and Future Intelligent Educational Environments", January, 2023.
Link

Increasing the Sampling Efficiency for the Link Assessment Problem
A. Chinazzo, C. De Schryver, K. Zweig, N. Wehn. In: Bast, H., Korzen, C., Meyer, U., Penschuck, M. (eds) Algorithms for Big Data. Lecture Notes in Computer Science, vol 13201, January, 2023, Springer.
DOI

A Custom Hardware Architecture for the Link Assessment Problem
A. Chinazzo, C. De Schryver, K. Zweig, N. Wehn. In: Bast, H., Korzen, C., Meyer, U., Penschuck, M. (eds) Algorithms for Big Data. Lecture Notes in Computer Science, vol 13201, January, 2023, Springer.
DOI

Automatic DRAM Subsystem Configuration with irace
L. Steiner, G. Delazeri, I. Prando da Silva, M. Jung, N. Wehn . International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC), Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), January, 2023, Toulouse, France.

2022
 

Exploration of Thermoelectric Energy Harvesting for Secure, TLS-based Industial IoT Nodes
F. Lauer, M. Schöffel, C. Rheinländer, N. Wehn. International Conference on Internet of Things (ICIOT-2022), December, 2022, Honolulu, Hawaii.

Blind and Channel-agnostic Equalization Using Adversarial Networks
V. Lauinger, M. Hoffmann, J. Ney, N. Wehn, L. Schmalen. IEEE GLOBECOM, December, 2022, Rio de Janeiro, Brazil.

Recent Advances in Oil-Spills Monitoring using Drone-Based Radar Remote Sensing
B. Hammoud, N. Wehn. Book chapter in Marine Pollution - Recent Developments, November, 2022, IntechOpen, ISBN 978-1-80356-300-8.

A Framework for Formal Verification of DRAM Controllers
L. Steiner, C. Sudarshan, M. Jung, D. Stoffel, N. Wehn. ACM/IEEE International Symposium on Memory Systems (MEMSYS 2022), October - December, 2022, virtual conference.
Preprint arXiv

Unveiling the Real Performance of LPDDR5 Memories
L. Steiner, M. Jung, M. Huonker, N. Wehn. ACM/IEEE International Symposium on Memory Systems (MEMSYS 2022), October - December, 2022, virtual conference.
Preprint arXiv

Parallel Single Parity Check Nodes for High-Throughput Fast-SSCL Polar Code Decoders
L. Johannsen, C. Kestel, T. Vogt, N. Wehn. IEEE Symposium on Future Telecommunication Technologies (SOFTT), November, 2022, Johor Bahru, Malaysia.
Best Paper Award

Code-based Cryptography in IoT: A HW/SW Co-Design of HQC
M. Schöffel,J. Feldmann, N. Wehn. IEEE World Forum on Internet of Things, November, 2022, Yokohama, Japan.
Best Paper Award

Minimum-Integer Computation Finite Alphabet Message Passing Decoder: From Theory to Decoder Implementations towards 1 Tb/s
T. Monsees, O. Griebel, M. Herrmann, D. Wübben , A. Dekorsy, N. Wehn. Entropy, Special Issue "Theory and Application of the Information Bottleneck Method", October, 2022.
Link

Investigation of Pass Transistor Logic in a 12nm FinFET CMOS Technology
A. Chinazzo, J. Lappas, C. Weis, Q. Huang, Z. Wu, L. Ni, N. Wehn. IEEE International Conference on Electronics Circuits and Systems (ICECS 2022), October, 2022, Glasgow, UK.

FeFET versus DRAM based PIM Architectures: A Comparative Study
C. Sudarshan, T. Soliman, T. Kampfe, C. Weis, N. Wehn. IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), October, 2022, Patras, Greece.

A 22nm ASIC for Flexible Post-Quantum Cryptography
P. Karl, J. Schupp, D. Basu-Roy, M. Schöffel, J. Feldmann, N. Wehn, G. Sigl. Workshop on Topics in hArdware SEcurity and RISC-V (TASER), September, 2022, Leuven, Belgium.

Beyond 100 Gbit/s Pipeline Decoders for Spatially Coupled LDPC Codes
M. Herrmann, N. Wehn. EURASIP Journal on Wireless Communications and Networking, Special Issue ’Wireless Technologies towards 6G’, September, 2022, Springer.
Link

Towards More Secure PUF Applications: A Low-Area Polar Decoder Implementation
C. Kestel, C. Frisch, M. Pehl, N. Wehn. IEEE International System-On-Chip Conference (SOCC 2022), September, 2022, Belfast, UK.

Efficient Hardware Approximation for Bit-Decomposition Based Deep Neural Network Accelerators
T. Soliman, A. Eldebiky, C. De La Parra, A. Guntoro, N. Wehn. IEEE International System-On-Chip Conference (SOCC 2022), September, 2022, Belfast, UK.

Artificial Neural Networks-based Radar Remote Sensing to Estimate Geographical Information during Oil-Spills
B. Hammoud, C. Bou Maroun, J. Ney, N. Wehn. IEEE European Signal Processing Conference (EUSIPCO), September, 2022, Belgrade, Serbia.

Ensemble BP Decoding for Short Block Codes
K. Kraft, N. Wehn. Poster Session, International Symposium on Topics in Coding (ISTC) Workshop, August, 2022, Montréal, Canada.

Increasing Throughput of In-Memory DNN Accelerators by Flexible Layer-wise DNN Approximation
C. De la Parra, T. Soliman, A. Guntoro, A. Kumar, N. Wehn. IEEE Micro, August, 2022.

A Critical Assessment of DRAM-PIM Architectures - Trends, Challenges and Solutions
C. Sudarshan, M. H. Sadi, L. Steiner, C. Weis, N. Wehn. International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XXII), July, 2022, Samos Island, Greece.

Finite-Alphabet Message Passing using only Integer Operations for highly parallel LDPC Decoders
T. Monsees, D. Wübben, A. Dekorsy, O. Griebel, M. Herrmann, N. Wehn. IEEE International Workshop on Signal Processing Advances in Wireless Communications (SPAWC 2022), July, 2022, Oulu, Finnland.

A Maximum A-Posteriori Probabilistic Approach Using UAV- Nadir-Looking Wide-Band Radar for Remote Sensing Oil-Spill Detection
B. Hammoud, N. Wehn. IEEE International Geoscience and Remote Sensing Symposium (IGARSS), July, 2022, Kuala Lumpur, Malaysia.

A Weighted Current Summation based Mixed Signal DRAM-PIM Architecture for Deep Neural Network Inference
C. Sudarshan, T. Soliman, J. Lappas, C. Weis, M. H. Sadi, M. Jung, A. Guntoro, N. Wehn. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Special Issue "Revolution of AI and Machine Learning with Processing-in-Memory (PIM): from Systems, Architectures, to Circuits", June, 2022.

Machine learning based soft error rate estimation of pass transistor logic in high-speed communication
Z. Zhang, J. Lappas, A. Chinazzo, C. Weis, Z. Wu, L. Ni, N. Wehn, M. Tahoori. 27th IEEE European Test Symposium, May, 2022, Barcelona, Spain.

A Hybrid Approach combining ANN-based and Conventional Demapping in Communication for Efficient FPGA-Implementation
J. Ney, B. Hammoud, N. Wehn. 29th Reconfigurable Architectures Workshop (RAW 2022), May, 2022, Lyon, France.

Optimization of DRAM based PIM Architecture for Energy-Efficient Deep Neural Network Training
C. Sudarshan, M. H. Sadi, C. Weis, N. Wehn. IEEE International Symposium on Circuits and Systems (ISCAS), May, 2022, Austin, TX, USA.

FELIX: A Ferroelectric FET Based Low Power Mixed-Signal In-Memory Architecture for DNN Acceleration
T. Soliman, N. Laleni, T. Kirchner, F. Müller, A. Shrivastava, T. Kämpfe, A. Guntoro, N. Wehn. ACM Transactions on Embedded Computing Systems, April, 2022.

Efficient FPGA Implementation of an ANN-Based Demapper using Cross-Layer Analysis
J. Ney, B. Hammoud, S. Dörner, M. Herrmann, J. Clausius, S. ten Brink, N. Wehn. Electronics Special Issue "Applications of FPGAs and Reconfigurable Computing: Current Trends and Future Perspectives", April, 2022.
Link

Secure IoT in the Era of Quantum Computers — Where Are the Bottlenecks?
M. Schöffel, F. Lauer, C. Rheinländer, N. Wehn. Sensors, Special Issue "Lightweight Security Integrity and Confidentiality for Internet of Things (IoT)”, March, 2022.
Link

Revisiting Pass-Transistor Logic Styles in a 12nm FinFET Technology Node
J. Lappas, A. Chinazzo, C. Weis, C. Xia, Z. Wu, L. Ni, N. Wehn. Design, Automation and Test in Europe Conference 2022 (DATE 22), March, 2022, Antwerp, Belgium.

DRAMSys4.0: An Open-Source Simulation Framework for In-Depth DRAM Analyses
L. Steiner, M. Jung, F. S. Prado, K. Bykov, N. Wehn. International Journal of Parallel Programming (IJPP), Springer, 2022.

Spatially Coupled Serially Concatenated Codes: Performance Evaluation and VLSI Design Tradeoffs
M. Mahdavi, S. Weithoffer, M. Herrmann, L. Liu, O. Edfors, N. Wehn, M. Lentmaier. IEEE Transactions on Circuits and Systems I: Regular Papers, March, 2022.

Smart Sensors for Augmented Electrical Experiments
S. Kapp, F. Lauer, F. Beil, C. Rheinländer, N. Wehn, J. Kuhn. Sensors, Volume 22, Issue 1: 256, 2022.
Link

FPGA-based Trainable Autoencoder for Communication Systems
J. Ney, S. Dörner, M. Herrmann, M. H. Sadi, J. Clausius, S. ten Brink, N. Wehn. ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, February, 2022, Virtual Conference.

Multidimensional Minimum Euclidean Distance Approach Using Radar Reflectivities for Oil Slick Thickness Estimation
B. Hammoud, G. Daou, N. Wehn. Sensors, Special Issue "RADAR Sensors and Digital Signal Processing", February, 2022.
Link

Partial Order-Based Decoding of Rate-1 Nodes in Fast Simplified Successive-Cancellation List Decoders for Polar Codes
L. Johannsen, C. Kestel, O. Griebel, T. Vogt, N. Wehn. MDPI Electronics, Special Issue "VLSI Architectures for Wireless Communications and Digital Signal Processing", February, 2022.
Link

2021

Forward Error Correction: A Bottleneck for THz Systems
O. Sahin, N. Wehn. Book chapter in "T. Kürner, D. M. Mittleman, T. Nagatsuma: THz Communications - Paving the Way Towards Wireless Tbps", pp 355-375, December, 2021, Springer.

In-Memory Computing exceeding 10000 TOPS/W using Ferroelectric Field Effect Transistors for EdgeAI Applications
N. Laleni, T. Soliman, F. Mueller, S. Mojumder, T. Kirchner, M. Lederer, T. Hoffmann, A. Guntoro, N. Wehn, T. Kaempfe. MikroSystemTechnik Congress 2021, November, 2021, Ludwigsburg, Germany.

QuantYOLO: A High-Throughput and Power-Efficient Object Detection Network for Resource and Power Constrained UAVs
M. G. Javed, M. Raza, M. M. Ghaffar , C. Weis, F. Shafait, N. Wehn , M. Shahzad. IEEE International Conference on Digital Image Computing: Techniques and Applications (DICTA2021), November, 2021, Gold Coast, QLD, Australia.

Burnt Forest Estimation from Sentinel-2 Imagery of Australia using Unsupervised Deep Learning
N. Abid, M. I. Malik, M. Shahzad, F. Shafait, H. Ali, M. M. Ghaffar, C. Weis, N. Wehn. IEEE International Conference on Digital Image Computing: Techniques and Applications (DICTA2021), November, 2021, Gold Coast, QLD, Australia.

iDocChip: A Configurable Hardware Accelerator for an End-to-End Historical Document Image Processing
M. Tekleyohannes, V. Rybalkin, M. M. Ghaffar, J. Varela, N. Wehn, A. Dengel. Journal of Imaging, Special Issue: Image Processing Using FPGAs, 2021.
Link

An LPDDR4 Safety Model for Automotive Applications
L. Steiner, D. Uecker, M. Jung, K. Kraft, M. Huonker, N. Wehn. ACM/IEEE International Symposium on Memory Systems (MEMSYS 2021), October, 2021, Washington, DC, USA.

Online Working Set Change Detection with Constant Complexity
G. Vasan, É. F. Zulian, C. Weis, M. Jung, N. Wehn. ACM/IEEE International Symposium on Memory Systems (MEMSYS 2021), October, 2021, Washington, DC, USA.

Embedded Face Recognition for Personalized Services in the Assistive Robotics
I. Walter, J. Ney, T. Hotfilter, V. Rybalkin, J. Höfer, N. Wehn, J. Becker. ITEM workshop ECML-PKDD, September, 2021, virtual conference.

Forward-Error-Correction for Beyond-5G Ultra-high Throughput Communications
N. Wehn, O. Sahin, M. Herrmann. International Symposium on Topics in Coding 2021 (ISTC 2021), September, 2021, Montréal, Canada.

Energy Efficient FEC Decoders
M. Herrmann, C. Kestel, N. Wehn. International Symposium on Topics in Coding 2021 (ISTC 2021), September, 2021, Montréal, Canada.

Towards Fully Pipelined Decoding of Spatially Coupled Serially Concatenated Codes
M. Mahdavi, L. Liu, O. Edfors, M. Lentmaier, N. Wehn, S. Weithoffer. International Symposium on Topics in Coding 2021 (ISTC 2021), September, 2021, Montréal, Canada.

When massive GPU parallelism ain't enough: A Novel Hardware Architecture of 2D-LSTM Neural Network
V. Rybalkin, J. Ney, M. Tekleyohannes, M. M. Ghaffar, N. Wehn. ACM Journal Transactions on Reconfigurable Technology and Systems (TRETS), 2021.
Link

HALF: Holistic Auto Machine Learning for FPGAs
J. Ney, D. Loroch, V. Rybalkin, N. Weber, J. Krueger, N. Wehn. 31th International Conference on Field-Programmable Logic and Applications (FPL), August, 2021, Dresden, Germany.

AI-ForestWatch: Semantic Segmentation based End-to-End Framework for Forest Estimation and Change Detection Using Multi-Spectral Remote Sensing Imagery
A. Zulfiqar, M. M. Ghaffar, M. Shahzad, C. Weis, M. I. Malik, F. Shafait, N. Wehn. Journal of Applied Remote Sensing, Volume 15, Issue 2, 2021.
Link

Different approaches to helping students develop conceptual understanding in university physics
T. J. Kelly, M. Thees, S. Kapp, J. Kuhn, P. Lukowicz, N. Wehn, M. De Cock, P. van Kampen, J. Guisasola, L Dvořák. Journal of Physics: Conference Series, Volume 1929, July, 2021.

A 336 Gbit/s Full-Parallel Window Decoder for Spatially Coupled LDPC Codes
M. Herrmann, N. Wehn, M. Thalmaier, M. Fehrenz, T. Lehnigk-Emden, M. Alles. Joint European Conference on Networks and Communications & 6G Summit (EuCNC/6G Summit), June, 2021, Porto, Portugal.

Adaptable Approximation Based on Bit Decomposition for Deep Neural Network Accelerators
T. Soliman, C. De La Parra, A. Guntoro, N. Wehn. IEEE International Conference on Artificial Intelligence Circuits and Systems, June, 2021, virtual conference.

ADMM-based ML Decoding: From Theory to Practice
K. Kraft, N. Wehn. IEEE International Conference on Acoustics, Speech and Signal Processing, June, 2021, Toronto, Ontario, Canada.

Longevity of Commodity DRAMs in Harsh Environments through Thermoelectric Cooling
D. M. Mathew, H. Kattan, C. Weis, J. Henkel, N. Wehn, H. Amrouch. IEEE Access, Volume 8, Pages 83950-83962, May, 2021.
Link

A Novel DRAM Architecture for Improved Bandwidth Utilization and Latency Reduction Using Dual-Page Operation
C. Sudarshan, L. Steiner, M. Jung, J. Lappas, C. Weis, N. Wehn. IEEE International Symposium on Circuits and Systems (ISCAS), May, 2021, Daegu, South Korea. Published in: IEEE Transactions on Circuits and Systems II: Express Briefs (Volume: 68, Issue: 5, May 2021).

Exploiting Resiliency for Kernel-wise CNN Approximation enabled by Adaptive Hardware Design
C. De la Parra, A. El-Yamany, T. Soliman, A. Kumary, N. Wehn, A. Guntoro. IEEE International Symposium on Circuits and Systems (ISCAS), May, 2021, Daegu, South Korea.

On the Energy Costs of Post-Quantum KEMs in TLS-based Low-Power Secure IoT
M. Schöffel, F. Lauer, C. Rheinländer, N. Wehn. 6th ACM/IEEE Conference on Internet of Things Design and Implementation, May, 2021, Nashville, TN, USA.

iDocChip - A Configurable Hardware Architecture for Historical Document Image Processing: Multiresolution Morphology-based Text and Image Segmentation
M. Tekleyohannes, V. Rybalkin, M. M. Ghaffar, J. Varela, N. Wehn, A. Dengel. International Journal of Parallel Programming, Springer, 2021.
Link

Towards Tbit/s Wireless Communication Baseband Processing: When Shannon meets Moore
M. Herrmann, N. Wehn. Book chapter in L. Andrade, F. Rousseau - Multi-Processor System-on-Chip 2, March, 2021, Wiley, ISBN: 9781789450217.

Exploration of DDR5 with the Open Source Simulator DRAMSys
L. Steiner, M. Jung, N. Wehn. 24. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, March, 2021, Munich, Germany.

A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs
C. Sudarshan, T. Soliman, C. De la Parra, C. Weis, L. Ecco, M. Jung, N. Wehn, A. Guntoro. 26th Asia and South Pacific Design Automation Conference (ASP-DAC), January, 2021, virtual conference.

2020

Design of Efficient, Dependable SoCs Based on a Cross-Layer-Reliability Approach with Emphasis on Wireless Communication as Application and DRAM Memories
C. Weis, C. Gimmler-Dumont, M. Jung, N. Wehn. In: J. Henkel, N. Dutt (eds) Dependable Embedded Systems. Embedded Systems. Springer, Cham. pp 435-455, December, 2020.
Link

RAP Model—Enabling Cross-Layer Analysis and Optimization for System-on-Chip Resilience
A. Herkersdorf, M. Engel, M. Glaß, J. Henkel, V. B. Kleeberger, J. M. Kühn, P. Marwedel, D. Mueller-Gritschneder, S. R. Nassif, S. Rehman, W. Rosenstiel, U. Schlichtmann, M. Shafique, J. Teich, N. Wehn, C. Weis. In: J. Henkel, N. Dutt (eds) Dependable Embedded Systems. Embedded Systems. Springer, Cham. pp 1-27 , December, 2020.
Link

LP100 - Optimization of 100Gb/s Short Range Wireless Transceivers under Processing Energy Constraints
G. Ascheid, G. Wang, S. Birke, N. Wehn, M. Herrmann, Y. Wang, O. Hanay, E. Bayram, R. Negra. Book chapter in "R. Kraemer, S. Scholz: Wireless 100 Gbps And Beyond. Architectures, Approaches and Findings of German Research Foundation (DFG) Priority Programme SPP1655", Publisher: IHP - Innovations for High Performance Microelectronics, 2020, ISBN: 978-3-96439-003-5.

Ultra Low Power Flexible Precision FeFET based Analog In-memory Computing
T. Soliman, F. Müller, T. Kirchner, T. Hoffmann, H. Ganem, E. Karimov, T. Ali, M. Lederer, C. Sudarshan, T. Kämpfe, A. Guntoro, N. Wehn. IEEE International Electron Devices Meeting (IEDM), December, 2020, virtual conference.

Moderne Speicherarchitekturen für leistungsfähige Infotainmentsysteme und autonomes Fahren
M. Jung, M. Huonker, R. Kalmar, N. Wehn. Springer ATZelektronik, 15, 16–21, November, 2020.

Efficient Generation of Application Specific Memory Controllers
M. V. Natale, M. Jung, K. Kraft, F. Lauer, J. Feldmann, C. Sudarshan, C. Weis, S. O. Krumke, N. Wehn. ACM/IEEE International Symposium on Memory Systems (MEMSYS 2020), October, 2020, virtual conference.

Multi-Valued Physical Unclonable Functions based on Dynamic Random Access Memory
S. Müelich, C. Sudarshan, C. Weis, M. Bossert, R. F. H. Fischer, N. Wehn. ACM/IEEE International Symposium on Memory Systems (MEMSYS 2020), October, 2020, virtual conference.

An Energy Efficient 3D-Heterogeneous Main Memory Architecture for Mobile Devices
D. M. Mathew, F. S. Prado, É. F. Zulian, C. Weis, M. M. Ghaffar, M. Jung, N. Wehn. ACM/IEEE International Symposium on Memory Systems (MEMSYS 2020), October, 2020, virtual conference.

An In-DRAM Architecture for Quantized CNNs using Fast Winograd Convolutions
M. M. Ghaffar, C. Sudarshan, C. Weis, M. Jung, N. Wehn. ACM/IEEE International Symposium on Memory Systems (MEMSYS 2020), October, 2020, virtual conference.

Harvester-Aware Transient Computing: Utilizing the Mechanical Inertia of Kinetic Energy Harvesters for a Proactive Frequency-Based Power Loss Detection
C. Rheinländer, N. Wehn. Journal Integration, Volume 75, Pages 122-130, August, 2020, Elsevier.

Communication Performance vs. Implementation Trade-offs of Interpolation Techniques for FFT-Based Carrier Synchronization exemplified on DVB-RCS2
O. Griebel, U. Wasenmüller, N. Wehn. Advances in Radio Science, Volume 18, September, 2020.
Link

A Ferroelectric FET Based In-memory Architecture for Multi-Precision Neural Networks
T. Soliman, R. Olivo, M. Lederer, T. Kämpfe, T. Kirchner, A. Guntoro, N. Wehn. 2020 IEEE 33rd International System-on-Chip Conference (SOCC), September, 2020, virtual conference.

Low-complexity Computational Units for the Local-SOVA Decoding Algorithm
S. Weithoffer, R. Klaimi, C. A. Nour, N. Wehn, C. Douillard. IEEE 31st PIMRC'20 - Workshop on Enabling Technologies for Terahertz Communications, September, 2020, London, UK.

A 506 Gbit/s Polar Successive Cancellation List Decoder with CRC
C. Kestel, L. Johannsen, O. Griebel, J. Jimenez, T. Vogt, T. Lehnigk-Emden, N. Wehn. IEEE 31st PIMRC'20 - Workshop on Enabling Technologies for Terahertz Communications, September, 2020, virtual conference.

A Reduced-Complexity Projection Algorithm for ADMM-based LP Decoding
F. Gensheimer, Tobias Dietz, K. Kraft, Stefan Ruzika, N. Wehn. IEEE Transactions on Information Theory, Volume 66, Issue 8, August, 2020.

The gem5 Simulator: Version 20.0+ A new era for the open-source computer architecture simulator
J. Lowe-Power, A. M. Ahmad, A. Akram, M. Alian, R. Amslinger, M. Andreozzi, A. Armejach, N. Asmussen, S. Bharadwaj, G. Black, G. Bloom, B. R. Bruce, D. R. Carvalho, J. Castrillon, L. Chen, N. Derumigny, S. Diestelhorst, W. Elsasser, M. Fariborz, A. Farmahini-Farahani, P. Fotouhi, R. Gambord, J. Gandhi, D. Gope, T. Grass, B. Hanindhito, A. Hansson, S. Haria, A. Harris, T. Hayes, A. Herrera, M. Horsnell, S. A. R. Jafri, R. Jagtap, H. Jang, R. Jeyapaul, T. M. Jones, M. Jung, S. Kannoth, H. Khaleghzadeh, Y. Kodama, T. Krishna, T. Marinelli, C. Menard, A. Mondelli, T. Mück, O. Naji, K. Nathella, H. Nguyen, N. Nikoleris, L. E. Olson, M. Orr, B. Pham, P. Prieto, T. Reddy, A. Roelke, M. Samani, A. Sandberg, J. Setoain, B. Shingarov, M. D. Sinclair, T. Ta, R. Thakur, G. Travaglini, M. Upton, N. Vaish, I. Vougioukas, Z. Wang, N. Wehn, C. Weis, D. A. Wood, H. Yoon, É. F. Zulian. arXiv Preprint, July, 2020.
Link

Efficient FeFET Crossbar Accelerator for Binary Neural Networks
T. Soliman, R. Olivio, T. Kirchner, C. De la Parra, M. Lederer, T. Kämpfe, A. Guntoro, N. Wehn. 31st IEEE International Conference on Application-specific Systems, Architectures and Processors, July, 2020, Manchester, UK.

Efficient Hardware Architectures for 1D- and MD-LSTM Networks
V. Rybalkin, C. Sudarshan, C. Weis, J. Lappas, N. Wehn, L. Cheng. Springer "Journal of Signal Processing Systems", 2020.
Link

eBrainII: A 3 kW Realtime Custom 3D DRAM integrated ASIC implementation of a Biologically Plausible Model of a Human Scale Cortex
D. Stathis, C. Sudarshan, Y. Yang, M. Jung, S. Asad, M. H. Jafri, C. Weis, A. Hemani, A. Lansner, N. Wehn. Springer "Journal of Signal Processing Systems", 2020.
Link

DRAMSys4.0: A Fast and Cycle-Accurate SystemC/TLM-Based DRAM Simulator
L. Steiner, M. Jung, F. S. Prado, K. Bykov, N. Wehn. International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), July, 2020, Samos Island, Greece.

FERA - A Framework for Critical Assessment of Execution Monitoring based Approaches for Finding Concurrency Bugs
J. Jahić, T. Bauer, T. Kuhn, N. Wehn. Springer "Advances in Intelligent Systems and Computing", 2020.
Link

Fully Pipelined Iteration Unrolled Decoders - The Road to Tb/s Turbo Decoding
S. Weithoffer, R. Klaimi, C. A. Nour, N. Wehn, C. Douillard. 45th International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2020), May, 2020, Barcelona, Spain.

The Dynamic Random Access Memory Challenge in Embedded Computing Systems
M. Jung, C. Weis, N. Wehn. Book chapter in Jian-Jia Chen (Eds.), A Journey of Embedded and Cyber-Physical Systems, July, 2020, Springer.

Real-Time Energy Efficient Hand Pose Estimation: Case Study
R. Al Koutayni, V. Rybalkin, J. Malik, A. Elhayek, C. Weis, G. Reis, N. Wehn, D. Stricker. Sensors Journal, Volume 20, Issue 10, May, 2020.

Analysis and Optimization of TLS-based Security Mechanisms for Low Power IoT Systems
F. Lauer, C. Rheinländer, C. Kestel, N. Wehn. 1st Workshop on Secure IoT, Edge and Cloud Systems (SIoTEC 2020), May, 2020, Melbourne, Australia.

Access-Aware Per-Bank DRAM Refresh for Reduced DRAM Refresh Overhead
É. F. Zulian, C. Weis, N. Wehn. IEEE International Symposium on Circuits & Systems (ISCAS), Poster Session Digital Circuit for Machine Learning & Emerging Memory Circuits, May, 2020, Seville, Spain.

Advanced Hardware Architectures for Turbo Code Decoding Beyond 100 Gb/s
S. Weithoffer, O. Griebel, R. Klaimi, C. A. Nour, N. Wehn. IEEE Wireless Communications and Networking Conference, April, 2020, Seoul, South Korea.

Fast and Accurate DRAM Simulation: Can we Further Accelerate it?
J. Feldmann, M. Jung, K. Kraft, L. Steiner, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2020, Grenoble, France.
Nominated for Best Paper Award

TLS-Level Security for Low Power Industrial IoT Network Infrastructures
J. Mades, G. Ebelt, B. Janjic, F. Lauer, C. Rheinländer, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2020, Grenoble, France.

When massive GPU parallelism ain't enough: A Novel Hardware Architecture of 2D-LSTM Neural Network
V. Rybalkin, N. Wehn. ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, February, 2020, Seaside, CA, USA.

System Simulation with PULP Virtual Platform and SystemC
É. F. Zulian, G. Haugou, C. Weis, M. Jung, N. Wehn. International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC), Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), January, 2020, Bologna, Italy.

2019

iDocChip - A Configurable Hardware Architecture for Historical Document Image Processing: Text Line Extraction
M. Tekleyohannes, V. Rybalkin, S. S. Bukhari, M. M. Ghaffar, N. Wehn and A. Dengel. International Conference on Reconfigurable Computing and FPGAs (ReConFig 2019), December, 2019, Cancun, Mexico.

Structural Data Compression for Embedded Long Prediction Horizon Model Predictive Control on Resource-Constrained FPGA Platforms
C. Rheinländer, F. Berkel, M. Douglas, M. Schäfer, N. Wehn, S. Liu. 1st IEEE International Conference on Electrical, Control And Instrumentation Engineering (ICECIE), November, 2019, Kuala Lumpur, Malaysia.

Channel Models for Physical Unclonable Functions based on DRAM Retention Measurements
S. Müelich, S. Bitzer, C. Sudarshan, C. Weis, N. Wehn, M. Bossert, R. F. H. Fischer. XVI International Symposium "Problems of Redundancy in Information and Control Systems" (REDUNDANCY), October, 2019, Moscow, Russia.

Fast Validation of DRAM Protocols with Timed Petri Nets
M. Jung, K. Kraft, T. Soliman, C. Sudarshan, C. Weis, N. Wehn. ACM International Symposium on Memory Systems (MEMSYS 2019), October, 2019, Washington, DC, USA.
Best Paper Award

iDocChip - A Configurable Hardware Architecture for Historical Document Image Processing: Multiresolution Morphology-based Text and Image Segmentation
M. Tekleyohannes, V. Rybalkin, S. Bukhari, M. M. Ghaffar, J. Varela, N. Wehn, A. Dengel. International Embedded Systems Symposium (IESS 2019), September, 2019, Friedrichshafen, Germany.
Best Paper Award

The Memory Wall: Challenges and Solutions
N. Wehn. Keynote at the 32nd IEEE International System-on-Chip Conference SOCC 2019, September, 2019, Singapore.

Fast Simulation of DRAMs with Neural Networks
M. Jung, J. Feldmann, M. M. Ghaffar, N. Wehn. Talk at the 1st ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), September, 2019, Canmore, Alberta, Canada.

Rapid Identification of Shared Memory in Multithreaded Embedded Systems with Static Scheduling
J. Jahić, V. Kumar, M. Jung, G. Wirrer, N. Wehn, T. Kuhn. International Workshop on Embedded Multicore Systems (ICPP-EMS 2019) in conjunction with the 48th International Conference on Parallel Processing (ICPP 2019), August, 2019, Kyoto, Japan.

A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing
C. Sudarshan, J. Lappas, C. Weis, D. M. Mathew, M. Jung, N. Wehn. International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), July, 2019, Samos Island, Greece.

RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM
D. M. Mathew, A. Chinazzo, C. Weis, M. Jung, B. Giraud, P. Vivet, A. Levisse, N. Wehn. IEEE International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July, 2019, Samos Island, Greece.

Adaptive Transient Computing for Power-Neutral Embedded Devices
C. Rheinländer, N. Wehn. 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), July, 2019, Rhodes, Greece.
Best Paper Award

Channel Coding for Tbit/s Communications: An Implementation Centric View
N. Wehn. European Conference on Networks and Communications (EuCNC), June, 2019, Valencia, Spain.

An In-DRAM Neural Network Processing Engine
C. Sudarshan, J. Lappas, M. M. Ghaffar, V. Rybalkin, C. Weis, M. Jung, N. Wehn. IEEE International Symposium on Circuits and Systems (ISCAS), May, 2019, Sapporo, Japan.

Real-time Image Recognition System Based on an Embedded Heterogeneous Computer and Deep Convolutional Neural Networks for Deployment in Constrained Environments
M. D. da Silva Carvalho, F. Koark, C. Rheinländer, N. Wehn. WCX World Congress Experience, SAE International, April, 2019, Detroit, MI, USA.
Link

Augmenting Kirchhoff’s laws: Using augmented reality and smartglasses to enhance conceptual electrical experiments for high school students
S. Kapp, M. Thees, M. Strzys, F. Beil, J. Kuhn, O. Amiraslanov, H. Javaheri, P. Lukowicz, F. Lauer, C. Rheinländer, N. Wehn. The Physics Teacher, vol. 57, no. 1, pages 52-53, DOI 10.1119/1.5084931, 2019.

Polar Code Decoder Framework
T. Lehnigk-Emden, M. Alles, C. Kestel, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2019, Florence, Italy.

Speculative Temporal Decoupling Using fork()
M. Jung, F. Schnicke, M. Damm, T. Kuhn, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2019, Florence, Italy.

Medienbildung entlang der Lehrerbildungskette – Maßnahmen zur Unterrichts- und Personalentwicklung
E.-M. Glade, C. Gómez Tutor, J. Kuhn, N. Wehn. S. G. Huber (Hrsg.), Jahrbuch Schulleitung 2019, pages 403-421, Carl Link Verlag, February, 2019.

3D Memories
C. Weis, M. Jung, N. Wehn. Book chapter in the Handbook of 3D Integration Vol 4, Wiley-VCH, 2019.
Link

2018

When Channel Coding Hits the Implementation Wall
C. Kestel, M. Herrmann, N. Wehn. International Symposium on Turbo Codes & Iterative Information Processing (ISTC), December, 2018, Hong Kong, China.

25 Years of Turbo Codes: From Mb/s to beyond 100 Gb/s
S. Weithoffer, C. A. Nour, N. Wehn, C. Douillard, C. Berrou. International Symposium on Turbo Codes & Iterative Information Processing (ISTC), December, 2018, Hong Kong, China.

A Low-Complexity Projection Algorithm for ADMM-Based LP Decoding
F. Gensheimer, T. Dietz, S. Ruzika, K. Kraft, N. Wehn. International Symposium on Turbo Codes & Iterative Information Processing (ISTC), December, 2018, Hong Kong, China.

A Framework for Non-Intrusive Trace-driven Simulation of Manycore Architectures with Dynamic Tracing Configuration
J. Jahic, M. Jung, T. Kuhn, C. Kestel, N. Wehn. RV 2018 - The 18th International Conference on Runtime Verification, November, 2018, Limassol, Cyprus.

Driving Into the Memory Wall: The Role of Memory for Advanced Driver Assistance Systems and Autonomous Driving
M. Jung, S. A. McKee, C. Sudarshan, C. Dropmann, C. Weis, N. Wehn. ACM International Symposium on Memory Systems (MEMSYS 2018), October, 2018, Washington, DC, USA.

Efficient Coding Scheme for DDR4 Memory Subsystems
K. Kraft, D. M. Mathew, C. Sudarshan, M. Jung, C. Weis, N. Wehn, F. Longnos. ACM International Symposium on Memory Systems (MEMSYS 2018), October, 2018, Washington, DC, USA.
Best Paper Award

Sparsity in Deep Neural Networks - An Empirical Investigation with TensorQuant
D. Loroch, F.-J. Pfreundt, N. Wehn, J. Keuper. 1st Workshop on Decentralized Machine Learning at the Edge (DMLE'18), September, 2018, Dublin, Ireland.

Enabling Continuous Software Engineering for Embedded Systems Architectures with Virtual Prototypes
P. O. Antonino, M. Jung, A. Morgenstern, F. Faßnacht, T. Bauer, A. Bachorek, T. Kuhn, E. Y. Nakagawa. 12th European Conference on Software Architecture (ECSA 2018), September, 2018, Madrid, Spain.

A Model-Based Safety Analysis of Dependencies Across Abstraction Layers
C. Dropmann, E. Thaden, M. Trapp, D. Uecker, R. Amarnath, L. Avila da Silva, P. Munk, M. Schweizer, M. Jung, R. Adler. 37th International Conference on Computer Safety, Reliability and Security (SafeComp), September, 2018, Västeras, Sweden.

Polar Code Decoder Exploration Framework
C. Kestel, S. Weithoffer, N. Wehn. Advances in Radio Science, Volume 16, September, 2018.

Where to go from Here? New Cross Layer Techniques for LTE Turbo-Code Decoding at High Code Rates
S. Weithoffer, N. Wehn. Advances in Radio Science, Volume 16, September, 2018.
Link

FINN-L: Library Extensions and Design Trade-off Analysis for Variable Precision LSTM Networks on FPGAs
V. Rybalkin, A. Pappalardo, M. M. Ghaffar, G. Gambardella, N. Wehn, M. Blott. 28th International Conference on Field Programmable Logic and Applications (FPL), August, 2018, Dublin, Ireland.

iDocChip: A Configurable Hardware Architecture for Historical Document Image Processing: Percentile Based Binarization
V. Rybalkin, S. S. Bukhari, A. Ghafoor, M. M. Ghaffar, N. Wehn, A. Dengel. ACM DocEng 2018 Conference, August, 2018, Halifax, Nova Scotia, Canada.

Design and Analysis of Reduced Precision LSTM Networks on FPGA
N. Wehn. Invited Talk, 17th International Forum on Embedded MPSoC and Multicore, July, 2018, Snowbird, UT, USA.

The (DRAM) Memory Challenge in Computing Systems
N. Wehn. Invited Talk, 17th International Forum on Embedded MPSoC and Multicore, July, 2018, Snowbird, UT, USA.

BOSMI: A Framework for Non-Intrusive Monitoring and Testing of Embedded Multithreaded Software on the Logical Level
J. Jahić, T. Kuhn, M. Jung, N. Wehn. IEEE International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July, 2018, Samos Island, Greece.

Next-Generation Channel Coding Towards Terabit/s Wireless Communications
N. Wehn, O. Sahin. European Conference on Networks and Communications (EuCNC), June, 2018, Ljubljana, Slovenia.

Improved Maximum-Likelihood Decoding Using Sparse Parity-Check Matrices
F. Gensheimer, T. Dietz, S. Ruzika, K. Kraft, N. Wehn. International Conference on Telecommunications, June, 2018, Saint Malo, France.

Improved Channel Coding with Manipulated Matrices
K. Kraft, T. Dietz. Young Researchers Symposium, June, 2018, Kaiserslautern, Germany.
3. Best Talk Award

Artificial Neural Network Specific Memory Systems
C. Sudarshan. Young Researchers Symposium, June, 2018, Kaiserslautern, Germany.

A Reconfigurable Accelerator for Morphological Operations
M. Tekleyohannes, C. Weis, Norbert Wehn, M. Klein, M. Siegrist. IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)(RAW2018), May, 2018, Vancouver, Canada.

A Platform for Analyzing DDR3 and DDR4 DRAMs
M. Jung, D. M. Mathew, C. Rheinländer, C. Weis, N. Wehn. IEEE International Symposium on Circuits and Systems (ISCAS), May, 2018, Florence, Italy.

The Role of Memories in Transprecision Computing
C. Weis, M. Jung, É. F. Zulian, C. Sudarshan, D. M. Mathew, N. Wehn. IEEE International Symposium on Circuits and Systems (ISCAS), May, 2018, Florence, Italy.

Bridging the Gap between Architecture Specifications and Simulation Models
P. O. Antonio, J. Jahic, B. Kallweit, A. Morgenstern, T. Kuhn. 2018 IEEE International Conference on Software Architecture Companion (ICSA-C), May, 2018, Seattle, WA, USA.

Using gem5 for Memory Research
É. F. Zulian, M. Jung, N. Wehn. Invited talk, International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Learning gem5 Tutorial (Gem5), March, 2018, Williamsburg, VA, USA.
PDF

Driving Against the Memory Wall: The Role of Memory for Autonomous Driving
M. Jung, N. Wehn. Workshop on New Platforms for Future Cars: Current and Emerging Trends at IEEE Conference Design, Automation and Test in Europe (DATE), March, 2018, Dresden, Germany.

Improving the Error Behavior of DRAM by Exploiting its Z-Channel Property
K. Kraft, M. Jung, C. Sudarshan, D. M. Mathew, C. Weis, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2018, Dresden, Germany.

An Analysis on Retention Error Behavior and Power Consumption of Recent DDR4 DRAMs
D. M. Mathew, M. Schultheis, C. Rheinländer, C. Sudarshan, M. Jung, C. Weis, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2018, Dresden, Germany.

The Transprecision Computing Paradigm: Concept, Design, and Applications
C. Malossi, M. Schaffner, A. Molnos, L. Gammaitoni, G. Tagliavini, A. Emerson, A. Tomás, D. S. Nikolopoulos, E. Flamand, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2018, Dresden, Germany.

A Memory Centric Architecture of the Link Assessment Algorithm in Large Graphs
C. Brugger, V. Grigorovici, M. Jung, C. De Schryver, C. Weis, N. Wehn, K. Zweig. IEEE Design & Test Volume 35 Number 1, January/February 2018, pp. 7–15.

Running Financial Risk Management Applications on FPGA in the Amazon Cloud
J. Varela, N. Wehn. White Paper, January, 2018.
PDF

Humbold 2.0: Über die Rolle Innovativer Universitäten im deutschen Wissenschaftssystem
A. Poetzsch-Heffter, N. Wehn. Hochschule der Zukunft, p. 63-80, 2018, Springer VS, Wiesbaden.

2017

Optimization of Wireless Transceivers under Processing Energy Constraints
G. Wang, G. Ascheid, Y. Wang, O. Hanay, R. Negra, M. Herrmann, N. Wehn. FREQUENZ, vol. 71, issue 9-10, pp. 379-388, DOI: 10.1515/freq-2017-0150, De Gruyter, 2017.

Low-Latency CRC calculation in Turbo-Code Decoding
S. Weithoffer, N. Wehn. International Journal of Wireless Information Networks, DOI: 10.1007/s10776-017-0374-z, Springer, 2017.
PDF

TensorQuant - A Simulation Toolbox for Deep Neural Network Quantization
D. Loroch, F. Pfreundt, N. Wehn, J. Keuper. 3rd Workshop on Machine Learning in High Performance Computing Environment (MLHPC 2017), November, 2017, Denver, CO, USA.

Real-Time Financial Risk Measurement of Dynamic Complex Portfolios with Python and PyOpenCL
J. Varela, N. Wehn, S. Desmettre, R. Korn. In PyHPC'17: 7th Workshop on Python for High-Performance and Scientific Computing, November, 2017, Denver, CO, USA.
Link

Online monitoring for safety-critical multicore systems
S. Tobuschat, A. Kostrzewa, F. K. Bapp, C. Dropmann. it - Information Technology, vol. 59, issue 5, pp. 215–222, De Gruyter, 2017.

Advanced Wireless Digital Baseband Signal Processing Beyond 100 Gbit/s
S. Weithoffer, M. Herrmann, C. Kestel, N. Wehn. IEEE International Workshop on Signal Processing Systems (SIPS), October, 2017, Lorient, France.

Development of a Novel Indoor Positioning System with mm-range Precision based on RF Sensors Network
R. Xiong, S. van Waasen, C. Rheinländer, N. Wehn. IEEE Sensor Letters, Vol. 1, No. 5, October 2017.

Using Run-Time Reverse-Engineering to Optimize DRAM Refresh
D. M. Mathew, É. F. Zulian, M. Jung, K. Kraft, C. Weis, B. Jacob, N. Wehn. International Symposium on Memory Systems (MEMSYS 2017), October, 2017, Washington, DC, USA.

Integrating DRAM Power-Down Modes in gem5 and Quantifying their Impact
R. Jagtap, M. Jung, W. Elsasser, C. Weis, A. Hansson, N. Wehn. International Symposium on Memory Systems (MEMSYS 2017), October, 2017, Washington, DC, USA.

Accelerated Simulated Fault Injection Testing
E. Cioroaica, J. Jahic, T. Kuhn, C. Peper, D. Uecker, C. Dropmann, P. Munk, A. Rakshith, E. Thaden. IEEE International Symposium on Software Reliability Engineering Workshops (ISSREW), October, 2017, Toulouse, France.

Bit-level Pipelining for Highly Parallel Turbo-Code Decoders: A Critical Assessment
S. Weithoffer, K. Kraft, N. Wehn. IEEE AFRICON, September, 2017, Cape Town, South Africa.

The Memory Challenge in Computing Systems: a Survey
N. Wehn. Invited Keynote, 30th IEEE International System-On-Chip Conference (SOCC 2017), September, 2017, Munich, Germany.

Support Development and Testing of Concurrent Software through Supervised Software Execution
J. Jahic, T. Kuhn, M. Jung, N. Wehn. Advanced Computer Architecture and Compilation for High-Performance Embedded Systems (ACACES), July, 2017, Fiuggi, Italy.
PDF

A New State Model for DRAMs Using Petri Nets
M. Jung, K. Kraft, N. Wehn. IEEE International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July, 2017, Samos Island, Greece.

Supervised Testing of Concurrent Software in Embedded Systems
J. Jahic, T. Kuhn, M. Jung, N. Wehn. IEEE International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July, 2017, Samos Island, Greece.

System Simulation with gem5 and SystemC: The Keystone for Full Interoperability
C. Menard, M. Jung, J. Castrillon, N. Wehn. IEEE International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July, 2017, Samos Island, Greece.

A Wearable Flexible Sensor Network Platform for the Analysis of Different Sport Movements
M. Schmidt, S. Wille, C. Rheinländer, N. Wehn, T. Jaitner. 8th International Conference on Applied Human Factors and Ergonomics (AHFE 2017), July, 2017, Los Angeles, CA, USA. [Best paper winner]

DRAM Memory Controller - From General Purpose to Application Specific Architectures
N. Wehn. Invited talk, 17th International Forum on Embedded MPSoC and Multicore, July, 2017, Annecy, France.

A Heterogeneous SDR MPSoC in 28 nm CMOS for Low-Latency Wireless Applications
S. Haas, T. Seifert, B. Nöthen, E. Perez Adeva, T. Augustin, F. Pauls, S. Moriam, M. Hasler, E. Fischer, Y. Chen, E. Matus, S. Scholze, S. Höppner, A. Dixius, G. Ellguth, S. Hartmann, S. Schiefer, L. Cederström, D. Walter, S. Henker, S. Hänzsche, J. Uhlig, H. Eisenreich, S. Weithoffer, N. Wehn, R. Schueffny, C. Mayr, G. Fettweis. IEEE/ACM Design Automation Conference (DAC), June, 2017, Austin, Texas.

Exploiting Decoupled OpenCL Work-Items with Data Dependencies on FPGAs: A Case Study
J. Varela, N. Wehn, Q. Liang, S. Tang. 2017 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)(RAW2017), May-June, 2017, Orlando, USA. [Best paper candidate]

A Platform to Analyze DDR3 DRAM’s Power and Retention Time
M. Jung, D. M. Mathew, C. Rheinländer, C. Weis, N. Wehn. IEEE Design & Test, July, 2017.
Link

Enhanced decoding for high-rate LTE Turbo-Codes with short block lengths
S. Weithoffer, N. Wehn. IEEE International Conference on Communications (ICC), Workshop on Channel Coding for 5G and Future Networks, May, 2017, Paris, France.

Near Real-Time Risk Simulation of Complex Portfolios on Heterogeneous Computing Systems with OpenCL
J. Varela, N. Wehn. 5th International Workshop on OpenCL (IWOCL 2017), May, 2017, Toronto, Canada.

3D-Stacked Many-Core Architecture for Biological Sequence Analysis Problems
P. Liu, A. Hemani, K. Paul, C. Weis, M. Jung, N. Wehn. International Journal of Parallel Programming (IJPP), Springer, April, 2017.

Hardware Architecture of Bidirectional Long Short-Term Memory Neural Network for Optical Character Recognition
V. Rybalkin, M. R. Yousefi, N. Wehn, D. Stricker. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2017, Lausanne, Switzerland.

An Advanced Embedded Architecture for Connected Component Analysis in Industrial Applications
M. Tekleyohannes, M. Sadri, M. Klein, M. Siegrist, C. Weis, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2017, Lausanne, Switzerland.

Latency Reduced LTE-A Turbo-Code Decoding with Iteration Balancing on Transport Block Level
S. Weithoffer, N. Wehn. 11th International ITG Conference on Systems, Communications and Coding, February, 2017, Hamburg, Germany.

A Bank-Wise DRAM Power Model for System Simulations
D. M. Mathew, É. F. Zulian, S. Kannoth, M. Jung, C. Weis, N. Wehn. International Conference on High-Performance and Embedded Architectures and Compilers 2017 (HiPEAC), Workshop on: Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), January, 2017, Stockholm, Sweden.

2016

Nested MC-Based Risk Measurement of Complex Portfolios: Acceleration and Energy Efficiency
S. Desmettre, R. Korn, J. Varela, N. Wehn. Risks Vol. 4, no. 4, pages 36, October, 2016.
Link

Increasing Sampling Efficiency for the Fixed Degree Sequence Model with Phase Transitions
C. Brugger, A. Chinazzo, A. John, C. De Schryver, N. Wehn, W. Schlauch, K. Zweig. Social Network Analysis and Mining (SNAM), 6(1):100, October, 2016. ISSN 1869-5469. DOI: 10.1007/s13278-016-0407-0.
Link

A Customized Many-Core Hardware Acceleration Platform for Short Read Mapping Problems Using Distributed Memory Interface with 3D-stacked Architecture
P. Liu, A. Hemani, K. Paul, C. Weis, M. Jung, N. Wehn. Journal of Signal Processing Systems, Springer, 2016.
Link

DRAMSpec: A High-Level DRAM Timing, Power and Area Exploration Tool
C. Weis, A. Mutaal, O. Naji, M. Jung, A. Hansson, N. Wehn. International Journal of Parallel Programming (IJPP), Springer, 2016.
Link

Precise Synchronization Time Stamp Generation for Bluetooth Low Energy
C. Rheinländer, N. Wehn. IEEE SENSORS 2016, October, 2016, Orlando, Florida, USA.

ConGen: An Application Specific DRAM Memory Controller Generator
M. Jung, I. Heinrich, M. Natale, D. M. Mathew, C. Weis, S. Krumke, N. Wehn. International Symposium on Memory Systems (MEMSYS 2016), October, 2016, Washington, DC, USA.
Link

Reverse Engineering of DRAMs: Row Hammer with Crosshair
M. Jung, C. Rheinländer, C. Weis, N. Wehn. International Symposium on Memory Systems (MEMSYS 2016), October, 2016, Washington, DC, USA.
Link

A New Bank Sensitive DRAMPower Model for Efficient Design Space Exploration
M. Jung, D. M. Mathew, É. F. Zulian, C. Weis, N. Wehn. International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2016), September, 2016, Bremen, Germany.
PDF

IMU-based determination of fatigue during long sprint
M. Schmidt, T. Jaitner, C. Rheinländer, S. Wille, N. Wehn. ACM International Joint Conference on Pervasive and Ubiquitous Computing (UbiComp 2016), September, 2016, Heidelberg, Germany.

Advanced Iterative Channel Coding Schemes: When Shannon meets Moore
S. Scholl, S. Weithoffer, N. Wehn. Invited talk, 9th International Symposium on Turbo Codes & Iterative Information Processing, September, 2016, Brest, France.

ADMM versus Simplex Algorithm for LP Decoding
F. Gensheimer, S. Ruzika, S. Scholl, N. Wehn.9th International Symposium on Turbo Codes & Iterative Information Processing, September, 2016, Brest, France.

On the applicability of Trellis Compression to Turbo-Code decoder hardware architectures
S. Weithoffer, F. Pohl, N. Wehn. 9th International Symposium on Turbo Codes & Iterative Information Processing, September, 2016, Brest, France.

Exploring System Performance using Elastic Traces: Fast, Accurate and Portable
R. Jagtap, S. Diestelhorst, A. Hansson, M. Jung, N. Wehn. IEEE International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July, 2016, Samos Island, Greece.

IMU-based determination of stance duration during sprinting
M. Schmidt, C. Rheinländer, K. Nolte, S. Wille, N. Wehn, T. Jaitner. 11th conference of the International Sports Engineering Association, July, 2016, Delft, The Netherlands.

Approximate Computing with Partially Unreliable Dynamic Random Access Memory: Approximate DRAM
M. Jung, D. M. Mathew, C. Weis, N. Wehn.In Proc. IEEE/ACM Design Automation Conference (DAC), June, 2016, Austin, TX, USA.

A new Architecture for High Speed, Low Latency NB-LDPC Check Node Processing for GF(256)
V. Rybalkin, P. Schläfer, N. Wehn. IEEE 83rd Vehicular Technology Conference (VTC2016-Spring), May, 2016, Nanjing, China.

An Efficient Soft Decision Reed-Solomon Decoder for Moderate Throughput
S. Scholl, S. Haider, N. Wehn. IEEE 18th Mediterranean Electrotechnical Conference (MELECON 2016), April, 2016, Limassol, Cyprus.

Towards safe mixed critical embedded multi-core systems in dynamic and changeable environments
C. Dropmann, T. Amorim, D. Schneider, A. Ruiz. CPS Week EMC2 Summit Topic: Safe open and adaptive system, April, 2016, Vienna, Austria.

Error Resilience and Energy Efficiency: An LDPC Decoder Design Study
P. Schläfer, C. Huang, C. Schoeny, C. Weis, Y. Li, N. Wehn, L. Dolecek. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2016, Dresden, Germany.

Saturated Min-Sum Decoding: An “Afterburner” for LDPC Decoder Hardware
S. Scholl, P. Schläfer, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2016, Dresden, Germany.

Conference Report: 1st International Symposium on Memory Systems (MEMSYS’15)
M. Jung. HiPEAC info 45 (Page 13), January, 2016, www.hipeac.net.
Link

Vertical jump diagnosis for multiple athletes using a wearable inertial sensor unit
T. Jaitner, M. Schmidt, K. Nolte, C. Rheinländer, S. Wille, N. Wehn. Sports Technology (Journal), January, 2016.

Efficient Reliability Management in SoCs - An Approximate DRAM Perspective
M. Jung, D. M. Mathew, C. Weis, N. Wehn. 21st Asia and South Pacific Design Automation Conference (ASP-DAC), Special Session: Cross-Layer Resilience: Snapshots from the Frontier of Design, January, 2016, Macao, China.

Software Architectures for Embedded Software Systems
P. Oliveira, A. Morgenstern, M. Jung, T. Kuhn, N. Wehn. Distance and Independent Studies Center (DISC) University of Kaiserslautern, 2016, Kaiserslautern, Germany.

2015

A Cross Layer Approach for Efficient Thermal Management in 3D Stacked SoCs
M. Jung, C. Weis, N. Wehn. Journal of Microelectronics Reliability, Elsevier 2015.
Link

Exploiting the Brownian Bridge Technique to improve Longstaff-Schwartz American Option Pricing on FPGA Systems
J. Varela, C. Brugger, C. De Schryver, N. Wehn, S. Tang, S. Omland. Proceedings of the 2015 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2015), December, 2015, Cancun, Mexico.

Efficient Architectures for Parity Check Matrix Generation
S. Scholl, N. Wehn. 23rd Telecommunications Forum (TELFOR 2015), November, 2015, Belgrade, Serbia.

Optimization Strategies for Portable Code for Monte Carlo-Based Value-at-Risk Systems
J. Varela, C. Kestel, C. De Schryver, N. Wehn, S. Desmettre, R. Korn. Proceedings of the 8th Workshop on High Performance Computational Finance (WHPCF '15), November, 2015, Austin, USA.

A New LDPC Decoder Hardware Implementation with Improved Error Rates
P. Schläfer, S. Scholl, E. Leonardi, N. Wehn. IEEE Jordan Conference on Applied Electrical Engineering and Computing Technologies (AEECT), November, 2015, Amman, Jordan.

Development of a Quasi Time Stretch Technology for Indoor Positioning System Based on Pulse Modulated Ultra High Frequency Radio
R. Xiong, S. van Waasen, J. Schelten, M. Schloesser, C. Rheinländer, N. Wehn. IEEE SENSORS 2015 conference, November, 2015, Busan, South Korea.

Reliability and Thermal Challenges in 3D Integrated Embedded Systems
C. Weis, M. Jung, N. Wehn. 1st International ESWEEK Workshop on Resiliency in Embedded Electronic Systems, October, 2015, Amsterdam, The Netherlands.
Link

Omitting Refresh - A Case Study for Commodity and Wide I/O DRAMs
M. Jung, É. Zulian, D. M. Mathew, M. Herrmann, C. Brugger, C. Weis, N. Wehn. 1st International Symposium on Memory Systems (MEMSYS 2015), October, 2015, Washington, DC, USA.

University Of Kaiserslautern Releases DRAMSpec In Cooperation With ARM
O. Naji, C. Weis, M. Jung, N. Wehn, A. Hansson. HiPEAC info 44 (Page 9), October, 2015, www.hipeac.net.

An application software download concept for safety critical embedded platforms
C. Dropmann, D. Rossi, B. Zimmer. CARS Workshop on the 11th European Dependable Computing Conference (EDCC 2015), September, 2015, Paris, France.

Multidirectional Modular Conditional Safety Certificates
T. Amorim, A. Ruiz, C. Dropmann, D. Schneider. 4th International Workshop on Next Generation of System Assurance Approaches for Safety-Critical Systems on international conference on computer safety, reliability and security (SAFECOMP 2015), September, 2015, Delft, Netherlands.

Precision-Tuning and Hybrid Pricer for Closed-Form Solution based Heston Calibration
C. Brugger, G. Liu, C. De Schryver, N. Wehn. Journal of Concurrency and Computation: Practice and Experience (JCCPE), Wiley, 2015

DRAMSys: A flexible DRAM Subsystem Design Space Exploration Framework
M. Jung, C. Weis, N. Wehn. IPSJ Transactions on System LSI Design Methodology (T-SLDM), August, 2015.
Link

Exploiting Phase Transitions for the Efficient Sampling of the Fixed Degree Sequence Model
C. Brugger, A. Chinazzo, A. F. John, C. De Schryver, N. Wehn, A. Spitz, K. Zweig. IEEE/ACM International Conference on Advances in Social Networks Analysis and Mining (ASONAM), August, 2015, Paris, France.

A new Architecture for High Throughput, Low Latency NB-LDPC Check Node Processing
P. Schläfer, V. Rybalkin, N. Wehn, M. Alles, T. Lehnigk-Emden, E. Boutillon. IEEE International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC), August, 2015, Hong Kong, China.

Latency Reduction for LTE/LTE-A Turbo-Code decoders by On-the-fly calculation of CRC
S. Weithoffer, N. Wehn. IEEE International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC), August, 2015, Hong Kong, China.

FPGA Based Accelerators for Financial Applications
C. De Schryver, editor. Springer International Publishing, July, 2015.
Link

Closed-Form Heston Pricers for Calibration
G. Liu, C. Brugger, C. De Schryver, N. Wehn. In FPGA Based Accelerators for Financial Applications, pages 221–242, Springer International Publishing, 1st edition, July, 2015.
Link

Exploiting Mixed-Precision Arithmetics in a Multilevel Monte Carlo Approach on FPGAs
S. Omland, M. Hefter, K. Ritter, C. Brugger, C. De Schryver, N. Wehn, A. Kostiuk. In FPGA Based Accelerators for Financial Applications, pages 191–220, Springer International Publishing, 1st edition, July, 2015.
Link

Bringing Flexibility to FPGA Based Pricing Systems
C. Brugger, C. De Schryver, N. Wehn. In FPGA Based Accelerators for Financial Applications, pages 167–190, Springer International Publishing, 1st edition, July, 2015.
Link

Pricing High-Dimensional American Options on Hybrid CPU/FPGA Systems
J. Varela, C. Brugger, S. Tang, N. Wehn, R. Korn. In FPGA Based Accelerators for Financial Applications, pages 143–166, Springer International Publishing, 1st edition, July, 2015.
Link

High-Bandwidth Low-Latency Interfacing with FPGA Accelerators Using PCI Express
M. Sadri, C. De Schryver, N. Wehn. In FPGA Based Accelerators for Financial Applications, pages 117–141, Springer International Publishing, 1st edition, July, 2015.
Link

Towards Automated Benchmarking and Evaluation of Heterogeneous Systems in Finance
C. De Schryver, C. Pereira Nogueira. In FPGA Based Accelerators for Financial Applications, pages 75–95, Springer International Publishing, 1st edition, July, 2015.
Link

A High-Level DRAM Timing, Power and Area Exploration Tool
O. Naji, A. Hansson, C. Weis, M. Jung, N. Wehn. IEEE International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July, 2015, Samos Island, Greece.
Link

A Custom Computing System for Finding Similarities in Complex Networks
C. Brugger, V. Grigorovici, M. Jung, C. Weis, C. De Schryver, K. Zweig, N. Wehn. Best Paper Award, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July, 2015, Montpellier, France.

An Embedded Computing Architecture for Finding Similarities in Large Networks, HPC on Embedded Computing Devices - a Case Study
N. Wehn. Invited talk, 15th International Forum on Embedded MPSoC and Multicore, July, 2015, Ventura, CA, USA.

Thermal Aspects and High-level Explorations of 3D stacked DRAMs
C. Weis, M. Jung, C. Santos, P. Vivet, O. Naji, A. Hansson, N. Wehn. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July, 2015, Montpellier, France.

A Cross Layer Reliability Approach for Efficient Thermal Management in 3D Stacked Wireless Baseband SoCs
M. Jung, C. Weis, N. Wehn. 8th International Conference on Materials for Advanced Technologies of the Materials Research Society of Singapore 2015 (ICMAT 2015) - Symposium on Reliability and Variability of Devices for Circuits and Systems (RV-DCS), June, 2015, Singapore, Singapore.

Virtual Development on Mixed Abstraction Levels: an Agricultural Vehicle Case Study
M. Jung, T. Purusothaman, X. Pan, S. Piao, T. Kuhn, C. Grimm, K. Berns, N. Wehn. Synopsys Users Group Conference (SNUG), June, 2015, Munich, Germany.

The Zedboard: A Modern “System On Chip” for Software Defined Radios
S. Scholl. Software Defined Radio Academy (SDRA), Ham Radio 2015, June, 2015, Friedrichshafen, Germany.

Towards Run-Time Flexible Risk Management Systems on Hybrid Platforms
C. De Schryver. Invited Talk, 10th International Symposium on Reconfigurable and Communication-centric Systems-on-Chip (ReCoSoC), June, 2015, Bremen, Germany.

Coupling gem5 with SystemC TLM 2.0 Virtual Platforms
M. Jung, N. Wehn. gem5 User Workshop, International Symposium on Computer Architecture (ISCA), June, 2015, Portland, OR, USA.
Link

An Optimal Microarchitecture for Finding Similarities in Complex Networks Based on Optimal Memory Hierarchies
C. Brugger, V. Grigorovici, M. Jung, C. Weis, C. De Schryver, K. Zweig, N. Wehn. WIP, IEEE/ACM Design Automation Conference (DAC), June, 2015, San Francisco, CA, USA.

Application-aware Cross-Layer Reliability Analysis and Optimization
M. Glaß, H. Aliee, L. Chen, M. Ebrahimi, F. Khosravi, V. B. Kleeberger, A. Listl, D. Müller-Gritschneder, F. Oboril, U. Schlichtmann, M. B. Tahoori, J. Teich, N. Wehn, and C. Weis. it - Information Technology 57, issue 3 (2015), de Gruyter Oldenbourg, Germany, May, 2015.

LP Decoding: From Software to Hardware
F. Gensheimer, S. Ruzika, S. Scholl. Invited Talk, IEEE Information Theory Workshop (ITW), May, 2015, Jerusalem, Israel.

Syndrome Based Check Node Processing of High Order NB-LDPC Decoders
P. Schläfer, N. Wehn, M. Alles, T. Lehnigk-Emden, E. Boutillon. IEEE International Conference on Telecommunications (ICT 2015), April, 2015, Sydney, Australia.
PDF

A Quantitative Cross-Architecture Study of Morphological Image Processing on CPUs, GPUs, and FPGAs
C. Brugger, L. Dal'Aqua, J. Varela, C. De Schryver, N. Wehn, Martin Klein, Michael Siegrist. In Proceedings of the 2015 IEEE Symposium on Computer Applications & Industrial Electronics (ISCAIE), April, 2015, Langkawi, Malaysia.

Retention Time Measurements and Modelling of Bit Error Rates of WIDE-I/O DRAM in MPSoCs
C. Weis, M. Jung, P. Ehses, C. Santos, P. Vivet, S. Goossens, M. Koedam, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2015, Grenoble, France.

Reverse Longstaff-Schwartz American Option Pricing on hybrid CPU/FPGA Systems
C. Brugger, J. Varela, N. Wehn, S. Tang, R. Korn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2015, Grenoble, France.

Entwicklung und Evaluation eines mobilen Messsystems zum Online-Monitoring von Leistungsparametern hochdynamischer Sprint- und Sprungbewegungen (SpoSeNs)
M. Schmidt, T. Jaitner, M. Bieschke, J-E. Jürjens, K. Nolte, C. Rheinländer, S. Wille, N. Wehn. BISp-Jahrbuch Forschungsförderung 2013/14, February, 2015.

Challenges and Limitations for Very High Throughput Decoder Architectures for Soft-Decoding
N. Wehn, S. Scholl, P. Schläfer, T. Lehnigk-Emden, M. Alles. Chapter 2 in: Chavet, C., Coussy, P. (Eds.): Advanced Hardware Design for Error Correcting Codes, Springer, January, 2015.
p. 7-31, ISBN: 978-3-319-10568-0
Link

Circuit Resilience Roadmap
V. Kleeberger, C. Weis, U. Schlichtmann, N. Wehn. Chapter 7 in: Reis, Ricardo, Cao, Yu, Wirth, Gilson (Eds.): Circuit Design for Reliability, Springer, January, 2015.
p. 121-143, ISBN 978-1-4614-4078-9
Link

2014

Hardware Implementation Issues of Carrier Synchronization for Pilot-Symbol Assisted Bursts: A Case Study for DVB-RCS2
I. Ali, U. Wasenmüller, N. Wehn. IEEE 8th International Conference on Signal Processing and Communication Systems, Gold Coast, Australia, December, 2014.
Link

A Systematic Approach for Software Interference Analysis
B. Zimmer, C. Dropmann, J. Haenger. 25th IEEE International Symposium on Software Reliability Engineering Workshops (ISSREW), November, 2014, Naples, Italy.

Beyond the abstract machine model - ホw looking at real computing systems leads to new algorithmic insights and massive speedups: two case studies
C. Brugger. Invited talk, Dagstuhl Seminar 14461 - High-performance Graph Algorithms and Applications in Computational Science, November, 2014, Dagstuhl, Germany.
Link

On Parallel Random Number Generation for Accelerating Hybrid Simulations of Communication Systems
C. Brugger, S. Weithoffer, C. De Schryver, U. Wasenmüller, N. Wehn. Advances in Radio Science, Volume 12, November, 2014.
Link

Heterogeneous Platforms for Big Data Applications
C. Brugger, C. De Schryver, N. Wehn. International Workshop on Heterogeneous Computing Platforms (HCP), November, 2014, San José, CA.
Link

Analysis of Functional Software Dependencies through Supervised Execution
J. Jahić, T. Kuhn. 25th IEEE International Symposium on Software Reliability Engineering Workshops (ISSREW), November, 2014, Naples, Italy.

Multisensorische Event-Erlebnisse auf Basis der iBeacon-Technologie - Berichte aus der Praxis
T. Jensen, S. Wille, N. Wehn. In Events und Emotionen - Stand und Perspektiven der Eventforschung, Springer Fachmedien Wiesbaden, October, 2014.
Link

Design Methodologies for Hardware Accelerated Heterogeneous Computing Systems
C. De Schryver. PhD thesis, University of Kaiserslautern, October, 2014.

Reliability Analysis of MIMO Channel Preprocessing by Fault Injection
C. Gimmler-Dumont, N. Wehn, V. Tomashevich, I. Polian. IEEE International Conference on Wireless for Space and Extreme Environments 2014, October, 2014, Noordwijk, The Netherlands.

A wearable inertial sensor unit for jump diagnosis in multiple athletes
M. Schmidt, T. Jaitner, K. Nolte, C. Rheinländer, S. Wille, N. Wehn. icSPORTS 2014, October, 2014, Rome, Italy.

Optimized Active and Power-Down Mode Refresh Control in 3D-DRAMs
M. Jung, M. Sadri, C. Weis, N. Wehn, L. Benini. IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), October, 2014, Playa del Carmen, Mexico.

A high throughput architecture for a low complexity soft-output demapping algorithm
I. Ali, U. Wasenmüller, N. Wehn. Kleinheubacher Tagung 2014 Miltenberg, Germany, September, 2014.
PDF

Monitoring household activities and user location with a cheap, unobtrusive and low-power thermal sensor array
P. Hevesi, P. Lukowicz, S. Wille, N. Wehn. Ubicomp 2014, September, 2014, Seattle, Washington, US.

Custom Computing Systems for Monte Carlo Option Pricing in the Heston Model
C. Brugger. Invited Talk, Reconfigurable Architectures in Finance Tutorial, IEEE Field Programmable Logic and Applications (FPL), September, 2014.
PDF

Sprungdiagnostik unter Feldbedingungen mittels Intertialsensoren
M. Schmidt, T. Jaitner, C. Rheinländer, S. Wille, N. Wehn. 10. Symposium der dvs-Sektion Sportinformatik, September, 2014, Vienna, Austria.

HyPER: A Runtime Reconfigurable Architecture for Monte Carlo Option Pricing in the Heston Model
C. Brugger, C. De Schryver, N. Wehn. IEEE Field Programmable Logic and Applications (FPL), September, 2014, Munich, Germany.
Link

A Simplex Algorithm for LP Decoding Hardware
F. Gensheimer, S. Ruzika, S. Scholl, N. Wehn. IEEE PIMRC'14, September, 2014, Washington, DC, USA.

HyPER – A Platform based Methodology to bring Flexibility to Hybrid FPGA/CPU Platforms in Finance
C. Brugger. Demo, IEEE Field Programmable Logic and Applications (FPL), September, 2014.
PDF

RIVER: Reconfigurable Flow and Fabric for real-time Signal Processing on FPGAs
C. Brugger, D. Hillenbrand, M. Balzer. ACM Transactions on Reconfigurable Technology and Systems, August, 2014.
Link

Advanced Hardware Architecture for Soft Decoding Reed-Solomon Codes
S. Scholl, N. Wehn. 8th International Symposium on Turbo Codes & Iterative Information Processing, August, 2014, Bremen, Germany.

Feedforward Carrier Synchronization for Pilotless Bursts of DVB-RCS2
I. Ali, U. Wasenmüller, N. Wehn. 9th IEEE/IET International Symposium on Communication Systems, Networks & Digital Signal Processing (CSNDSP’14), July, 2014, Manchester, U.K..
Link

Thermal Modelling of 3D Stacked DRAM with Virtual Platforms
M. Jung, M. Sadri, N. Wehn. Advanced Computer Architecture and Compilation for High-Performance Embedded Systems, ACACES 2014, July, 2014, Fiuggi, Italy.
ISBN 978-88-905806-2-8
PDF

Towards High-Performance Reconfigurable Computing: Current Challenges of a Rapid and High-Level Design Flow
C. Brugger, N. Wehn. Advanced Computer Architecture and Compilation for High-Performance Embedded Systems, ACACES 2014, July, 2014, Fiuggi, Italy.
ISBN 978-88-905806-2-8
PDF

HPC on Embedded Computing Devices - A Case Study
N. Wehn. Invited talk, 14th International Forum on Embedded MPSoC and Multicore, July, 2014, Margaux, France.

Efficient Maximum-Likelihood Decoding of Linear Block Codes on Binary Memoryless Channels
M. Helmling, E. Rosnes, S. Ruzika, S. Scholl. IEEE International Symposium on Information Theory, June, 2014, Honolulu, USA.

Future Energy Efficient Computing Systems - A (D) Memory Perspective
N. Wehn. Invited talk, European Nanoelectronics Design Technology Conference, June, 2014, Grenoble, France.

HyPER: A Runtime Reconfigurable Architecture for Monte Carlo Option Pricing in the Heston Model
C. Brugger, C. De Schryver, N. Wehn. WIP, IEEE/ACM Design Automation Conference (DAC), June, 2014, San Francisco, CA, USA.
PDF

A New Architecture for Minimum Mean Square Error Sorted QR Decomposition for MIMO Wireless Communication Systems
C. Gimmler-Dumont, N. Wehn, Victor Tomashevich, Christian Fesl, Ilia Polian. Design & Diagnostics of Electronic Circuits & Systems (DDECS 2014), April, 2014, Warschau, Polen.

A Cross-Layer Reliability Design Methodology for Efficient, Dependable Wireless Receivers
C. Gimmler-Dumont, N. Wehn. ACM Transactions on Embedded Computing Sytems, Volume 13 Issue 4s, Article No. 137 , April, 2014.
Link

Eine flexible WSN-­Plattform zur Leistungsdiagnostik und Trainingssteuerung im Leistung- und Hochleistungssport
T. Jaitner, C. Rheinländer, M. Schmidt, S. Wille, N. Wehn. 16. Frühjahrsschule "Informations- und Kommunikationstechnologien in der angewandten Trainingswissenschaft", April, 2014, Leipzig.
PDF

Progress in Binary and Non-Binary Low Density Parity Check Codes
P. Schläfer, M. Alles, T. Lehnigk-Emden, N. Wehn. Invited Talk CCSDS Spring Meeting 2014, April, 2014, Noordwijk, Netherlands.

Exploiting Expendable Process-Margins in DRAMs for Run-Time Performance Optimization
K. Chandrasekar, S. Goossens, C. Weis, M. Koedam, B. Akesson, N. Wehn, K. Goossens. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2014, Dresden.

Energy Optimization in 3D MPSoCs with Wide-I/O DRAM
M. Sadri, M. Jung, C. Weis, N. Wehn, L. Benini. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2014, Dresden.
Link

Mixed Precision Multilevel Monte Carlo on Hybrid Computing Systems
C. Brugger, C. De Schryver, N. Wehn, S. Omland, M. Hefter, K. Ritter, A. Kostiuk, R. Korn. IEEE Conference on Computational Intelligence for Financial Engineering and Economics (CIFEr), March, 2014, London, UK.
Link

Hardware Implementation of a Reed-Solomon Soft Decoder based on Information Set Decoding
S. Scholl, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2014, Dresden.

Hybrid Memory Architecture for Voltage Scaling in Ultra-Low-Power Multi-Core Biomedical Processors
D. Bortolotti, A. Bartolini, C. Weis, D. Rossi, L. Benini. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2014, Dresden.

Connecting Different Worlds - Technology Abstraction for Reliability-Aware Design and Test
U. Schlichtmann, V. Kleeberger, J. Abraham, A. Evans, C. Gimmler-Dumont, M. Glaß, A. Herkersdorf, S. Nassif, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2014, Dresden.

Resilience Articulation Point (RAP): Cross-layer Dependability Modeling for Nanometer System-on-chip Resilience
A. Herkersdorf, V. Kleeberger, S. Nassif, U. Schlichtmann, C. Gimmler-Dumont, C. Weis, N. Wehn, et. al. Journal of Microelectronics Reliability, Volume 54, Pages 1066-1074, ISSN 0026-2714, Elsevier 2014 , February, 2014.

Automatic Test Coverage Measurements to support Design Space Exploration
J. Jahić, T. Purusothaman, M. Damm, T. Kuhn, P. Liggesmeyer, C. Grimm. IFIP First International Workshop on Design Space Exploration of Cyber-Physical Systems (IDEAL), April, 2014, Berlin, Germany.
PDF

2013

Loopy - An Open-Source TCP/IP Rapid Prototyping and Validation Framework
C. De Schryver, P. Schläfer, N. Wehn, T. Fischer, A. Poetzsch-Heffter. Proceedings of the IEEE International Conference on Reconfigurable Computing and FPGAs (ReConFig), December, 2013, Cancún.
Link

Methodology for Rapid Accelerator Development Applied to Financial Applications
C. Brugger, N. Wehn. Proceedings of the IEEE International Conference on Reconfigurable Computing and FPGAs (ReConFig), December, 2013, Cancún.
PDF

Virtual Platforms for Fast Exploration of Computing Systems in Finance
C. Brugger, M. Jung, S. Omland. Young Researcher Symposium 2013, November, 2013, Kaiserslautern.
1. Best Paper Award
Link

Towards Hardware Implementation of the Simplex Algorithm for LP Decoding
F. Gensheimer, M. Helmling, S. Scholl. Young Researcher Symposium 2013, November, 2013, Kaiserslautern.
2. Best Paper Award

ID-enter: Multisensorische Messe-Interaktion der Zukunft
S. Wille, N. Wehn, T. Jensen. Konferenz Eventforschung, October, 2013, TU Chemnitz.
Springer Gabler, Events und Messen - Stand und Perspektiven der Eventforschung (2014), ISBN 978-3-658-06234-7, S. 263-274

Investigate the high-level HDL Chisel
F. Heilmann, C. Brugger, N. Wehn. White Paper, October, 2013, Kaiserslautern.
Link

A New Dimension of Parallelism in Ultra High Throughput LDPC Decoding
P. Schläfer, M. Alles, T. Lehnigk-Emden, N. Wehn. IEEE Workshop on Signal Processing (SIPS'13), October, 2013, Taipei, Taiwan.

Investigate the hardware description language Chisel - A case study implementing the Heston model
C. Stumm, C. Brugger, N. Wehn. White Paper, September, 2013, Kaiserslautern.
Link

FPGA Implementation of Trellis Decoders for Linear Block Codes
S. Scholl, E. Leonardi, N. Wehn. Advances in Radio Science, September, 2013.

Energy and Performance Exploration of Accelerator Coherency Port Using Xilinx ZYNQ
M. Sadri, C. Weis, N. Wehn, L. Benini. FPGAworld 2013, September, 2013, Copenhagen / Stockholm.

Hardware Implementations of Gaussian Elimination over GF(2) for Channel Decoding Algorithms
S. Scholl, C. Stumm, N. Wehn. IEEE AFRICON 2013, September, 2013, Mauritius.

Activity Recognition and Nutrition Monitoring in Every Day Situations with a Textile Capacitive Neckband
J. Cheng, B. Zhou, P. Lukowicz, C. Rheinländer, S. Wille, N. Wehn. UbiComp 2013, September, 2013, Zurich, Switzerland.

Code-Aided Synchronization with QPSK, 8-PSK and 16-QAM Modulations
I. Ali, U. Wasenmüller, N. Wehn. IEEE APCC 2013, August, 2013, Bali Island, Indonesia.
Link

Virtual Platforms for Fast Memory Subsystem Exploration Using gem5 and TLM2.0
M. Jung, M. Sadri, N. Wehn. Ninth International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES13), July, 2013, Fiuggi, Italy.
PDF

Multi-Gigabit Channel Decoders
N. Wehn. Invited talk, 13th International Forum on Embedded MPSoC and Multicore, July, 2013, Otsu, Japan.

Efficiency Metrics and Bandwidth - A Memory Perspective
N. Wehn. Invited Keynote, 8th IEEE International Workshop on Reconfigurable Communication-centric SoC (ReCoSoC), July, 2013, Darmstadt.

An energy-efficient weakly programmable MIMO detector architecture
C. Gimmler-Dumont, N. Wehn. Advances in Radio Science, Volume 11, July, 2013.
Link

A Cross-Layer Technology-Based Study of the Impact of Memory Errors on System Resilience
V. Kleeberger, C. Gimmler-Dumont, C. Weis, A. Herkersdorf, S. Nassif, U. Schlichtmann, N. Wehn, Daniel Müller-Gritschneder. IEEE Micro, Vol. 33, no. 4, pp. 46-55, July, 2013.
Link

Virtual Platforms for Memory Controller Design Space Exploration
M. Jung, Designers Track Talk. IEEE/ACM Design Automation Conference (DAC), June, 2013, Austin, TX, USA.

TLM Modelling of 3D Stacked Wide I/O DRAM Subsystems
M. Jung, Work-in-Progress Poster Session. IEEE/ACM Design Automation Conference (DAC), June, 2013, Austin, TX, USA.

Towards Variation-Aware System-Level Power Estimation of DRAMs: An Empirical Approach
K. Chandrasekar, C. Weis, B. Akesson, N. Wehn, K. Goossens. In Proc. IEEE/ACM Design Automation Conference (DAC), June, 2013, Austin, TX, US.
Link

Reliable On-Chip Systems in the Nano-Era: Lessons Learnt and Future Trends
L. Bauer, N. Dutt, P. Gupta, J. Henkel, S. Nassif, M. Shafique, M. Tahoori, N. Wehn. In Proc. IEEE/ACM Design Automation Conference (DAC), June, 2013, Austin, TX, US.
Perspective Paper

Performance Evaluation of Ambient Services by combining Robotic Frameworks and a Smart Environment Platform
M. Arndt, S. Wille, L. de Souza, V. Fortes Rey, N. Wehn, K. Berns. Elsevier: Journal on Robotics and Autonomous Systems, May, 2013.
Link

Power Modelling of 3D-Stacked Memories with TLM2.0 based Virtual Platforms
M. Jung, C. Weis, P. Bertram, G. Braun, N. Wehn. Synopsys User Group Conference (SNUG), May, 2013, Munich, Germany.
PDF

High-Performance Hardware Acceleration of Asset Simulations
C. De Schryver, H. Marxen, S. Weithoffer, N. Wehn. Springer New York, "High-Performance Computing using FPGAs", ISBN 978-1-4614-1790-3, May, 2013.
Link

Research Project for Energy-Efficient Risk Management Acceleration Started
C. De Schryver. HiPEAC info 34 (Page 19), www.hipeac.net, May, 2013.

AXI4-Stream Upsizing/Downsizing Data Width Converters for Hardware-In-the-Loop Simulations
L. Vega, P. Schläfer, C. De Schryver. Technical Report, April, 2013, Kaiserslautern.
Link

Exploration and Optimization of 3-D Integrated DRAM Subsystems
C. Weis, I. Loi, L. Benini, N. Wehn. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 32, Issue 4, Pages 597 - 610, April, 2013, New York, US.
Link

Cross-Layer Error-Resilience in Wireless Communication
C. Gimmler-Dumont, M. May, N. Wehn. Journal of Low Power Electronics, Vol. 9, No. 1, April, 2013.
Link

Cross-Layer Dependability Modeling and Abstraction in System on Chip
A. Herkersdorf, V. Kleeberger, S. Nassif, U. Schlichtmann, C. Weis, N. Wehn, et. al. 9th IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE), March, 2013, Standford University.

Cross layer Error resilience in MIMO Systems
N. Wehn. International Workshop on Software Approaches to Resilient System Design, IEEE Conference Design, Automation and Test in Europe (DATE), March, 2013, Invited Talk, Grenoble, France.

A Multi-Level Monte Carlo FPGA Accelerator for Option Pricing in the Heston Model
C. De Schryver, P. Torruella, N. Wehn. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2013, Grenoble, France.

System and Circuit Level Power Modeling of Energy-Efficient 3D-Stacked Wide I/O DRAMs
K. Chandrasekar, C. Weis, B. Akesson, N. Wehn, K. Goossens. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2013, Grenoble, France.

Collaborative Ambient Systems, From simple microcontrollers to complex connected and interactive Systems
N. Wehn. SymanO 2013, March, 2013, Invited Talk, Mannheim.

ASIC implementation of a modified QR decomposition for tree search based MIMO detection
C. Gimmler-Dumont, P. Schläfer, N. Wehn. In Proc. IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS 2013), February, 2013, Cusco, Peru.

Integer Programming as a Tool for Analysis of Channel Codes
S. Scholl, F. Kienle, M. Helmling, S. Ruzika. 9th International ITG Conference on Systems, Communications and Coding, January, 2013, Munich, Germany.

TLM Modelling of 3D Stacked Wide I/O DRAM Subsystems, A Virtual Platform for Memory Controller Design Space Exploration
M. Jung, C. Weis, N. Wehn, K. Chandrasekar. International Conference on High-Performance and Embedded Architectures and Compilers 2013 (HiPEAC), Workshop on: Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), January, 2013, Berlin.
Published by ACM New York, 2013, USA
Link

2012

FPGA-based Rapid Prototyping Platform for MIMO-BICM Design Space Exploration
C. Gimmler-Dumont, P. Schläfer, N. Wehn. 2012 International Conference on ReConFigurable Computing and FPGAs (ReConFig'12), December, 2012, Cancun, Mexico.
Link

A Methodology Approch for Cross Layer Error Resilience in Wireless Communication Systems
N. Wehn. International Workshop on HW/SW Techniques for Cross-Layer Resilience, colloacted ICCAD2012, November, 2012.

Reliability Study on System Memories of an Iterative MIMO-BICM System
C. Gimmler-Dumont, C. Brehm, N. Wehn. IFIP/IEEE International Conference on Very Large Scale Integration 2012, October, 2012, Santa Cruz, CA, USA.
Link

Modelling 3D-Stacked Memories with Virtual Platforms
M. Jung, C. Weis, N. Wehn. HiPEAC info 32 (Pages 12-13), www.hipeac.net, October, 2012.
Link

An energy efficient weakly programmable MIMO detector architecture
C. Gimmler-Dumont, N. Wehn. Kleinheubacher Tagung 2012, September, 2012, Miltenberg, Germany.
PDF

A Code-Aided Synchronization IP Core for Iterative Channel Decoders
I. Ali, U. Wasenmüller, N. Wehn. Kleinheubacher Tagung 2012, September, 2012, Miltenberg.
Link

A Design Study on Complexity Reduced Multipath Mitigation
U. Wasenmüller, T. Brack, I. Groh, E. Staudinger, S. Sand, N. Wehn. Advances in Radio Science, Volume 10, Pages 167-173, September, 2012.
Link

Design space exploration of high throughput finite field multipliers for channel coding on Xilinx FPGAs
C. De Schryver, S. Weithoffer, U. Wasenmüller, N. Wehn. Advances in Radio Science, Volume 10, Pages 175–181, September, 2012.
Link

Trainingsmonitoring in der betrieblichen Gesundheitsförderung mittels eines drahtlosen Sensornetzwerks
T. Jaitner, A. Kusch, S. Wille, N. Wehn, Jaitner et al. 9. Symposium der dvs-Sektion Sportinformatik, September, 2012, Universität Konstanz.
Proceedings Sportinformatik 2012
PDF

Combining Robotic Frameworks with a Smart Environment Framework: MCA2/SimVis3D and TinySEP
S. Wille, N. Wehn, M. Arndt, K. Berns, L. de Souza. Proceedings of the Ubirobots 2012 Workshop conducted at the 14th International Conference on Ubiquitous Computing (Ubicomp 2012), September, 2012, Pittsburgh, PA, USA.
Link
PDF

Architectural challenges for high-throughput iterative MIMO systems
F. Kienle, C. Gimmler-Dumont. Invited Talk, 7th International Symposium on Turbo Codes & Iterative Information Processing, August, 2012, Gothenborg, Sweden.

A 2.15GBit/s Turbo Code Decoder for LTE Advanced Base Station Applications
T. Ilnseher, F. Kienle, C. Weis, N. Wehn. 7th International Symposium on Turbo Codes & Iterative Information Processing, August, 2012, Gothenborg, Sweden.

ML vs. BP Decoding of Binary and Non-Binary LDPC Codes
S. Scholl, F. Kienle, M. Helmling, S. Ruzika. 7th International Symposium on Turbo Codes & Iterative Information Processing, August, 2012, Gothenborg, Sweden.
Link

Design Space of Flexible Multigigabit LDPC Decoders
P. Schläfer, M. Alles, C. Weis, N. Wehn. VLSI Design, vol. 2012, 10 pages, May, 2012.
Article ID 942893
Link

A High-Performance FPGA-Based Implementation of LZSS Compression Algorithm
I. Shcherbakov, C. Weis, N. Wehn. in Proceedings of IEEE Reconfigurable Architectures Workshop, May, 2012, Shanghai, China.

A Scalable Multi-Core ASIP Virtual Platform For Standard-Compliant Trellis Decoding
M. Jung, C. Brehm, N. Wehn. Synopsys User Group Conference (SNUG), May, 2012, Munich, Germany.
Link
PDF

Cross Layer Error Resilience in Wireless Communication Systems
N. Wehn. Proc. Fifth IEEE International Workshop on Impact of Low-Power Design on Test and Reliability, May, 2012, Annecy (invited).

A System View on Iterative MIMO Detection: Dynamic Sphere Detection versus Fixed Effort List Detection
C. Gimmler-Dumont, F. Kienle, B. Wu, G. Masera. VLSI Design, vol. 2012, 14 pages, April, 2012.
Article ID 826350
Link

A Parallel Adaptive Range Coding Compressor: Algorithm, FPGA Prototype, Evaluation
I. Shcherbakov, N. Wehn. in Proceedings of IEEE Data Compression Conference, April, 2012, Snowbird, UT, USA.
Link

How to Guarantee Application Functionality in a MOST150 Network - An Embedded Systems Approach
F. Schick, W. El Kassem, N. Wehn. In Proceedings MOST Forum 2012 Conference, March, 2012, Stuttgart / Esslingen, Germany.
Link
Facing dependability challenges at nanoscale: from devices to systems
N. Wehn. Design, Automation and Test in Europe (DATE) 2012, Friday Workshop, March, 2012, Grenoble, France.

An Energy Efficient DRAM Subsystem for 3D integrated SoCs
C. Weis, I. Loi, N. Wehn, L. Benini. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2012, Dresden, Germany.
Link

DRAM Selection and Configuration for Real-Time Mobile Systems
M. Gomony, C. Weis, B. Akesson, N. Wehn, K. Goossens. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2012, Dresden, Germany.
Link

A Hardware Efficient Random Number Generator for Nonuniform Distributions with Arbitrary Precision
C. De Schryver, D. Schmidt, N. Wehn, E. Korn, H. Marxen, A. Kostiuk, R. Korn. International Journal of Reconfigurable Computing (IJRC), vol. 2012, March, 2012.
Article ID 675130, 11 pages
Link
PDF

A Case Study on Error Resilient Architectures for Wireless Communication
C. Brehm, M. May, C. Gimmler-Dumont, N. Wehn. Springer LNCS 7179, Architecture of Computing Systems - ARCS 2012, pp. 13-24, February, 2012, Munich, Germany.
Link

ASIC Design of a Gbit/s LDPC Decoder for Iterative MIMO Systems
C. Gimmler-Dumont, F. Kienle, C. Weis, N. Wehn, M. Alles. IEEE International Conference on Computing, Networking & Communications, January, 2012, Maui, Hawaii.
Link

Energy Efficient Acceleration of Asset Simulations Using FPGAs
C. De Schryver, N. Wehn. HiPEAC info 29, pages 10 - 11, www.hipeac.net, January, 2012.
Link

TinySEP - Eine kompakte Plattform für Ambient Assisted Living
S. Wille, I. Shcherbakov, L. de Souza, N. Wehn. AAL-Kongress 2012 - Technik für ein selbstbestimmtes Leben, January, 2012, Berlin, Germany.
VDE Verlag, ISBN 978-3-8007-3400-9
PDF

TinySEP - A tiny platform for Ambient Assisted Living
S. Wille, I. Shcherbakov, L. de Souza, N. Wehn. , January, 2012, Berlin, Germany.
Springer Verlag, ISBN 978-3-642-27490-9
PDF

2011

An Energy Efficient FPGA Accelerator for Monte Carlo Option Pricing with the Heston Model
C. De Schryver, I. Shcherbakov, F. Kienle, N. Wehn, H. Marxen, A. Kostiuk, R. Korn. Proceedings of the IEEE International Conference on Reconfigurable Computing and FPGAs (ReConFig), pages 468-474, December, 2011, Cancun, Mexico.
PDF

On Complexity, Energy- and Implementation Efficiency of Channel Decoders
F. Kienle, N. Wehn, H. Meyr. IEEE Transactions on Communications, December, 2011.
Vol. 59, Nr. 12 , pages 3301 - 3310
PDF

Reliability: A Cross-Disciplinary and Cross-Layer Approach
N. Wehn. IEEE 20th Asian Test Symposium, November, 2011, Okhla, New Delhi, India.

Formal Hardware/Software Co-verification of Application Specific Instruction Set Processors
S. Loitz, M. Wedler, D. Stoffel, C. Brehm, W. Kunz, N. Wehn. in Tom J. Kamierski, Adam Morawiec (ed.) System Specification and Design Languages: Selected Contributions from FDL 2010, November, 2011.
Springer, ISBN-13: 978-1461414261

A Scalable Multi-ASIP Architecture for Standard Compliant Trellis Decoding
C. Brehm, T. Ilnseher, N. Wehn. IEEE International SoC Design Conference, November, 2011, Jeju, Korea.
COSAR Award received

Algorithmic Complexity in the Heston Model: An Implementation View
H. Marxen, A. Kostiuk, R. Korn, C. De Schryver, S. Wurm, I. Shcherbakov, N. Wehn. Proceedings of the fourth workshop on High Performance Computational Finance (WHPCF '11), pages 5-12, November, 2011, Seattle, Washington, USA.
Link
PDF

High-Performance Hardware Acceleration for Asset Simulations
C. De Schryver. Invited Talk, HiPEAC Design and Simulation Cluster Meeting, November, 2011, Barcelona, Spain.

Design and Architectures for Dependable Embedded Systems
J. Henkel, L. Bauer, J. Becker, O. Bringmann, U. Brinkschulte, S. Chakraborty, M. Engel, R. Ernst, H. Härtig, L. Hedrich, A. Herkersdorf, R. Kapitza, D. Lohmann, P. Marwedel, M. Platzner, W. Rosenstiel, U. Schlichtmann, O. Spinczik, M. Tahoori, J. Teich, N. Wehn, H. Wunderlich. IEEE Embedded Systems Week, October, 2011, Taipei, Taiwan.

Energy Efficient Acceleration and Evaluation of Financial Computations Towards Real-Time Pricing
C. De Schryver, M. Jung, N. Wehn, H. Marxen, A. Kostiuk, R. Korn. Proceedings of the 15th International Conference on Knowledge-Based and Intelligent Information & Engineering Systems (KES), pages 177-186, September, 2011, Kaiserslautern.
Link

Bringing C++ productivity to VHDL world: from language definition to a case study
I. Shcherbakov, C. Weis, N. Wehn. Forum on specification & Design Languages (FDL-2011), September, 2011, Oldenburg, Germany.
Link

Hardware Accelerators for Financial Mathematics - Methodology, Results and Benchmarks
N. Wehn. Invited talk, 11th International Forum on Embedded MPSoC and Multicore, July, 2011, Beaune, France.

A flexible and easy-to-use Wireless Sensor Network for online monitoring of physiological and biomechanical data of multiple athletes - exemplarily applied in indoor cycling
T. Jaitner, S. Wille, N. Wehn. ECSS 2011, July, 2011, Liverpool, England.
ECSS 2011 Book of Abstracts, page 104-105
PDF

A 2.5mW 2Mb/s Fully Integrated Impulse-FM-UWB Transceiver in 0.18µm CMOS
S. Anis, M. Ortmanns, N. Wehn. International Microwave Symposium for 2011 (IMS2011), June, 2011, Baltimore, Maryland.

Validation of Channel Decoding ASIPs -- A Case Study
C. Brehm, N. Wehn, S. Loitz, W. Kunz. 22nd IEEE International Symposium on Rapid System Prototyping (RSP), May, 2011, Karlsruhe.
Link

Architecture and Hardware Requirements for Turbo and LDPC decoders
F. Kienle, T. Brack, T. Vogt. Book chapter, Error Control Coding for B3G/4G Wireless Systems,WILEY, ISBN 978-0-470-77935-4, May, 2011.

A Monolithic LTE Interleaver Generator for highly parallel SMAP Decoders
T. Ilnseher, M. May, N. Wehn. IEEE Tenth Annual Wireless Telecommunications Symposium (WTS 2011), April, 2011, New York City, USA.
PDF

Design Space Exploration for 3D-stacked DRAMs
C. Weis, I. Loi, N. Wehn, L. Benini. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2011, Grenoble, France.
Link

Mathematical Optimization Based Channel Coding: Current Achievements and Future Research
M. Helmling, S. Scholl, A. Tanatmis. Proc. of 1st Young Researcher Symposium (YRS) 2011 (CEUR-WS.org, ISSN 1613-0073), February, 2011, Kaiserslautern.
Link

Hardware Accelerators for Financial Mathematics - Methodology, Results and Benchmarking
C. De Schryver, H. Marxen, D. Schmidt. Proceedings of the 1st Young Researcher Symposium (YRS) 2011 (CEUR-WS.org, ISSN 1613-0073), pages 55-60, February, 2011, Kaiserslautern.
Link
PDF

2010

A New Hardware Efficient Inversion Based Random Number Generator for Non-Uniform Distributions
C. De Schryver, D. Schmidt, N. Wehn, E. Korn, H. Marxen, R. Korn. Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), pages 190-195, December, 2010, Cancun, Mexico.
Link
PDF

AmICA - A flexible, compact, easy-to-program and low-power WSN platform
S. Wille, N. Wehn, I. Martinovic, S. Kunz, P. Göhner. Mobiquitous 2010, December, 2010, Sydney, Australia.
PDF

A Multi-Mode 3GPP-LTE/HSDPA Turbo Decoder
T. Ilnseher, M. May, N. Wehn. IEEE International Conference on Communication Systems (IEEE ICCS 2010), November, 2010, Singapore, Singapore.

Technical Report: AmICA - Design and implementation of a flexible, compact, and low-power node platform
S. Wille, N. Wehn, I. Martinovic, S. Kunz, P. Göhner. , October, 2010, Kaiserslautern.
Link
PDF

Simulation Acceleration in Wireless Baseband Processing
T. Lehnigk-Emden, M. Alles, T. Brack, N. Wehn. Processor and System-on-Chip Simulation, Springer, September, 2010.

Low-Complexity Iteration Control for MIMO-BICM Systems
C. Gimmler-Dumont, T. Lehnigk-Emden, N. Wehn. In Proc. IEEE 21 th International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC 2010), September, 2010.
PDF

RF Spectrum Sensing Technique for Cognitive UWB Radio Network
S. Anis, M. Ortmanns, N. Wehn. In Proc. 36th European Solid-State Circuits Conference (ESSCIRC 2010), September, 2010, Seville, Spain.

Complete Verification of Weakly Programmable IPs against their Operational ISA Model
S. Loitz, M. Wedler, D. Stoffel, C. Brehm, N. Wehn, W. Kunz. In Proc. Forum on Specification & Design Languages, September, 2010, Southampton, UK.

Complete Verification of Weakly Programmable IPs against their Operational ISA Model
S. Loitz, M. Wedler, D. Stoffel, C. Brehm, W. Kunz, N. Wehn. 4.GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf, September, 2010, Wildbad Kreuth, Germany.

A Lagrangian relaxation based decoding algorithm for LTE Turbo codes
A. Tanatmis, S. Ruzika, F. Kienle. In Proc. 6th International symposium on turbo codes & iterative information processing, September, 2010, Brest, France.

Calculating the Minimum Distance of Linear Block Codes via Integer Programming
M. Punekar, F. Kienle, N. Wehn, A. Tanatmis, S. Ruzika. In Proc. 6th International symposium on turbo codes & iterative information processing, September, 2010, Brest, France.

Implementation Comparisons of the QR decomposition for MIMO detection
G. Nazar, C. Gimmler-Dumont, N. Wehn. In Proc. 23rd Annual Symposium on Integrated Circuits and System Design (SBCCI 2010), September, 2010, Sao Paolo, Brazil.
PDF

Complexity Evaluation of Non-binary Galois Field LDPC Code Decoders
T. Lehnigk-Emden, N. Wehn. In Proc. 6th International symposium on turbo codes & iterative information processing, September, 2010, Brest, France.

Hardware Modeling: A Critical Assessment with Case Studies
N. Wehn. Invited Keynote, 22nd Euromicro Conference on Real-Time Systems (ECRTS10), July, 2010, Brussels, Belgium.

A Separation Algorithm for Improved LP-Decoding of Linear Block Codes
A. Tanatmis, S. Ruzika, H. W. Hamacher , M. Punekar, F. Kienle, N. Wehn. IEEE Transactions on Information Theory, Vol. 56, Nr. 7 , pages 3277 - 3289, July, 2010.

Efficiency Metrics for Design Space Exploration of Wireless Baseband Processing
N. Wehn. Invited talk, 10th International Forum on Embedded MPSoC and Multicore, June, 2010, Gifu, Japan.

MAGALI: a Network-on-Chip based multi-core System-on-Chip for MIMO 4G SDR
F. Clermidy, C. Bernard, R. Lemaire, J. Martin, I. Miro-Panades, Y. Thonnart, P. Vivet, N. Wehn. IC Design and Technology (ICICDT), June, 2010, Grenoble.
Link

UWB Impulse Transmitter and 402-to-405MHz Super-Regenerative Receiver for Medical Implant Devices
S. Anis, M. Ortmanns, N. Wehn. In Proc. IEEE International Symposium on Circuits and Systems, May, 2010, Paris, France.

Sphere-Decoder-First Channel Code Design
F. Kienle. In Proc. IEEE International Conference on Communications (ICC), May, 2010, Cape Town, South Africa.
PDF

Numerical Comparison of IP Formulations as ML decoders
A. Tanatmis, S. Ruzika, M. Punekar, F. Kienle. In Proc. IEEE International Conference on Communications (ICC), May, 2010, Cape Town, South Africa.

Low Power Self-Quenched Super-Regenerative Impulse-FM-UWB Transceiver for WBAN
S. Anis, M. Ortmanns, N. Wehn. In Proc. IEEE International Symposium on VLSI Design, Automation & Test (VLSI-DAT), April, 2010, Hsinchu, Taiwan.

FlexiChaP: A Dynamically Reconfigurable ASIP for Channel Decoding for Future Mobile Systems
M. Alles, T. Vogt, C. Brehm, N. Wehn. Published in: Dynamically Reconfigurable Systems (ISBN 978-90-481-3484-7), pages 293 - 314, DOI 10.1007/978-90-481-3485-4_14, March, 2010.

Dynamically Reconfigurable Systems
Edited by: M. Platzner, J. Teich, N. Wehn. ISBN 978-90-481-3484-7, Springer Science+Business Media, March, 2010.

A Rapid Prototyping System for Error-Resilient Multi-Processor Systems-on-Chip
M. May, N. Wehn, A. Bouajila, J. Zeppenfeld, W. Stechele, A. Herkersdorf, D. Ziener, J. Teich. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), pages 375-380, March, 2010, Dresden, Germany.

A 150Mbit/s 3GPP LTE Turbo Code Decoder
M. May, T. Ilnseher, N. Wehn, W. Raab. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), pages 1420-1425, March, 2010, Dresden, Germany.

A 477mW NoC-Based Digital Baseband for MIMO 4G SDR
F. Clermidy, C. Bernard, R. Lemaire, J. Martin, I. Miro-Panades, Y. Thonnart, P. Vivet, N. Wehn. In Proc. IEEE International Solid-State Circuits Conference (ISSCC) 2010, Volume 53, pages 278-279, February, 2010, San Francisco, USA.
PDF

Space-Time Bit Trellis Codes
F. Kienle, C. Gimmler-Dumont. In Proc. 8th International ITG Conference on Source and Channel Coding (SCC), January, 2010, Siegen, Germany.
PDF

Ultra Low Power RF Transceiver Architecture for In-body Communication System
S. Anis, G. Grau, N. Wehn. In Proc. IEEE 2010 Radio and Wireless Symposium, January, 2010, New Orleans, USA.

Low Power Self-quenched Super-regenerative Impulse-FM-UWB Transceiver for WBAN
S. Anis, G. Grau, N. Wehn. In Proc. IEEE 2010 Radio and Wireless Symposium, January, 2010, New Orleans, USA.

2009

Flexibility/Cost Trade-off in Wireless Baseband Processing
N. Wehn. IEEE/IFIP VLSI-SoC (Invited Keynote), October, 2009, Florianopolis, Brasil.

Low Complexity Turbo Synchronization without initial Carrier Synchronization
U. Wasenmüller, C. Gimmler-Dumont, N. Wehn. Advances in Radio Science, Volume 8, pages 123-128, September, 2009, Miltenberg, Germany.
Link

A Synthesizable IP Core for WiMedia 1.5 UWB LDPC Code Decoding
M. Alles, F. Berens, N. Wehn. In Proc. IEEE International Conference on Ultra-Wideband (ICUWB) 2009, pages 597 - 601, September, 2009, Vancouver, Canada.
PDF

DRAM Power Management and Energy Consumption: a Critical Assessment
D. Schmidt, N. Wehn. Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design (SBCCI '09), September, 2009, Natal, Brazil.
Article no. 32

Energy Simulation of Embedded XScale Systems with XEEMU
Z. Herczeg, D. Schmidt, Á. Kiss, N. Wehn, T. Gyimóthy. Special issue of Journal of Embedded Computing (JEC), Volume 3, Number 3, July, 2009.

Valid Inequalities for Binary Linear Codes
A. Tanatmis, S. Ruzika, H. W. Hamacher , M. Punekar, F. Kienle, N. Wehn. In Proc. IEEE International Symposium on Information Theory (ISIT), pages 2216 - 2220, July, 2009, Seoul, Korea.

Energy Modelling and Optimization - A Critical Assessment with two Case Studies
N. Wehn. 9th International Forum on Embedded MPSoC and Multicore (MPSoC'09), July, 2009, Savannah, Georgie, USA.

On Low-Density MIMO Codes
F. Kienle. In Proc. IEEE International Conference On Communications (ICC), pages 1 - 6 , June, 2009, Dresden, Germany.

3D Duo Binary Turbo Decoder Hardware Implementation
T. Lehnigk-Emden, M. Alles, N. Wehn. In Proc. ICT Mobile and Wireless Communications Summit (ICT-MobileSummit 2009), June, 2009, Santander, Spain.
PDF

A Noise Tolerant Method for ECG Signals Feature Extraction and Noise Reduction
E. Zoghlami Ayari, R. Tielert, N. Wehn. In Proc. 3rd International Conference on Bioinformatics and Biomedical Engineering (ICBBE 2009), June, 2009, Beijing, China.

A Rapid Prototyping Environment for ASIP Validation in Wireless Systems
M. Alles, T. Lehnigk-Emden, C. Brehm, N. Wehn. In Proc. edaWorkshop09, pages 43 - 48, May, 2009, Dresden, Germany.
PDF

A Review of Common Belief on Power Management and Power Consumption
D. Schmidt, N. Wehn. , April, 2009, University of Kaiserslautern, Germany.
White Paper
PDF

Error Correction in Single-Hop Wireless Sensor Networks - A Case Study
D. Schmidt, M. Berning, N. Wehn. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), April, 2009, Nice, France.

A Novel LDPC Decoder for DVB-S2 IP
S. Müller, M. Alles, M. Schreger, M. Kabutz, F. Kienle, N. Wehn. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), pages 1308 - 1313, April, 2009, Nice, France.
PDF

Simulation and Validation: Challenges in Wireless Baseband Processing
N. Wehn. Invited Talk, HIPEAC 2009 Rapid Simulation and Performance Evaluation Workshop, January, 2009, Paphos, Cyprus.

Wire Topology Optimization for Low Power CMOS
P. Zuber, O. Bahlous, T. Ilnseher, M. Ritter, W. Stechele. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 17, Number 1, Pages 1-11, January, 2009.

2008

Low Power electrocardiogram QRS Detection in real-time
E. Zoghlami Ayari, R. Tielert, N. Wehn. In Proc. 13th International Conference on Biomedical Engineering, pages 643-646, December, 2008, Singapore, Singapore.

A Reconfigurable ASIP for Convolutional and Turbo Decoding in a SDR Environment
T. Vogt, N. Wehn. IEEE Transactions on Very Large Scale Integration Systems, Volume 16, Number 10, pages 1309-1320, October, 2008.

Analysis of Iteration Control for Turbo Decoders in Turbo Synchronization Applications
T. Lehnigk-Emden, U. Wasenmüller, C. Gimmler-Dumont, N. Wehn. Advances in Radio Science, Volume 7, pages 139-144, September, 2008, Miltenberg, Germany.
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A Separation Algorithm for Improved LP-Decoding of Linear Block Codes
A. Tanatmis, S. Ruzika, H. W. Hamacher , M. Punekar, F. Kienle, N. Wehn. In Proc. IEEE 5th International Symposium on Turbo Codes & Related Topics, pages 37 - 42 , September, 2008, Lausanne, Schweiz.

FlexiChaP: A Reconfigurable ASIP for Convolutional, Turbo, and LDPC Code Decoding
M. Alles, T. Vogt, N. Wehn. In Proc. IEEE 5th International Symposium on Turbo Codes & Related Topics, pages 84 - 89 , September, 2008, Lausanne, Schweiz.
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Low-Density MIMO Codes
F. Kienle. In Proc. IEEE 5th International Symposium on Turbo Codes & Related Topics, pages 107 - 112 , September, 2008, Lausanne, Schweiz.

A New Fitting Approach for Online Electrocardiagram Component Waves Delineation
E. Zoghlami Ayari, R. Tielert, N. Wehn. In Proc. IEEE 35th annual Computers in Cardiology conference, pages 861 - 864, September, 2008, Bologna, Italien.

Super-Regenerative UWB Impulse Detector with Synchronized Quenching Mechanism
S. Anis, R. Tielert, N. Wehn. In Proc. IEEE 38th European Solid-State Device Research Conference & 34th European Solid-State Circuits Conference (ESSDERC-ESSCIRC 2008), pages 390 - 393 , September, 2008, Edinburgh, Großbritannien.

A 10Mb/s 2.6mW 6-to-10GHz UWB Impulse Transceiver
S. Anis, R. Tielert, N. Wehn. In Proc. IEEE International Conference on Ultra-Wideband (ICUWB) 2008, pages 129 - 132, September, 2008, Hannover, Deutschland.

A 400μW 10Mbits/s CMOS UWB Impulse Radio Transmitter for Wireless Sensor Networks
S. Anis, R. Tielert, N. Wehn. In Proc. IEEE International Conference on Ultra-Wideband (ICUWB) 2008, pages 33 - 35, September, 2008, Hannover, Deutschland.

Template-based Compression of ECG Signals
E. Zoghlami Ayari, R. Tielert, N. Wehn. In Proc. 30th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBS 2008), pages 283-286, August, 2008, Vancouver, Kanada.

Low Power Complementary-Colpitts Self-Quenched Super-regenerative Ultra-Wideband (UWB) Bandpass Filter in CMOS Technology
S. Anis, R. Tielert, N. Wehn. In Proc. International Microwave Symposium 2008 ,IMS 2008, June, 2008, Atlanta, Georgia, USA.

Proving Functional Correctness of Weakly Programmable IPs - A Case Study with Formal Property Checking
S. Loitz, M. Wedler, C. Brehm, T. Vogt, N. Wehn, W. Kunz. In Proc. IEEE Symposium on Application Specific Processors (SASP 2008), pages 48-54, June, 2008, Anaheim, California, USA.
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Power Measurement in Cycling using inductive Coupling of Energy and Data
R. Tielert, N. Wehn, T. Jaitner, R. Volk. In Proc. 7th conference of the international sport engineering asscociation (7th ISEA CONFERENCE 2008), June, 2008, Biarritz, Frankreich.

Enhanced Iteration Control for Ultra Low Power LDPC Decoding
T. Lehnigk-Emden, N. Wehn. In Proc. ICT Mobile and Wireless Communications Summit (ICT-MobileSummit 2008), June, 2008, Stockholm, Schweden.
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A Technical View on the URANUS Validation Platform
A. Viessmann, C. Spiegel, A. Burnic, Z. Bau, K. Statnikov, A. Waadt, S. Wang, X. Popon, R. Rodriguez Velilla, H. Saarnisaari, M. Alles, T. Brack, F. Kienle, F. Berens, S. Rotolo, F. Scalise, G. Bruck, N. Wehn, P. Jung. In Proc. ICT Mobile and Wireless Communications Summit (ICT-MobileSummit 2008), pages 10-12, June, 2008, Stockholm, Schweden.

System-on-Chip Design - Herausforderungen und Lösungsansätze
N. Wehn. Invited Keynote, edaWorkshop 2008, May, 2008, Hannover, Deutschland.

Fully Integrated Self-Quenched Super-Regenerative UWB Impulse Detector
S. Anis, R. Tielert, N. Wehn. In Proc. 3rd International Symposium on Wireless Pervasive Computing 2008, pages 773-775, May, 2008, Santorini, Griechenland.

3.1-to-7GHz UWB Impulse Radio Transceiver Front-End Based on Statistical Correlation Technique
S. Anis, R. Tielert, N. Wehn. In Proc. 2008 IEEE International Symposium on Circuits and Systems (ISCAS 2008), May, 2008, Seattle, USA.

Macro Interleaver Design for Bit Interleaved Coded Modulation with Low-Density Parity-Check Codes
F. Kienle, N. Wehn. In Proc. IEEE Vehicular Technology Conference (VTC), pages 763 - 766, May, 2008, Singapur, Singapur.

Fully Integrated Super-Regenerative Bandpass Filters For 3.1-to-7GHz Multiband UWB System
S. Anis, R. Tielert, N. Wehn. In Proc. IEEE International VLSI Design, Automation and Test (VLSI-DAT 2008), pages 204-207, April, 2008, Hsinchu, Taiwan.

A Case Study in Reliability-Aware Design: A Resilient LDPC Code Decoder
M. May, M. Alles, N. Wehn. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), pages 456 - 461, March, 2008, Munich, Germany.
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Flexibility/Reconfigurability Trade-offs in SDR Architectures
N. Wehn. Workshop Reconfigurable Computing - IEEE Conference Design, Automation and Test in Europe (DATE '08), March, 2008, München, Deutschland.

A Reconfigurable Application Specific Instruction Set Processor for Convolutional and Turbo Decoding in a SDR Environment
T. Vogt, N. Wehn. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2008, München, Deutschland.

Fully Integrated Multi-channel UWB Impulse Generator and Detector
S. Anis, N. Wehn. International Solid-State Circuits Conference (ISSCC 2008) Student Forum, February, 2008, San Francisco, USA.

A 3mW 1GHz Ultra-Wide-Bandpass Super-regenerative Filter
S. Anis, S. Tontisirin, R. Tielert, N. Wehn. In Proc. 2008 IEEE Radio and Wireless Symposium, pages 455 - 458, January, 2008, Orlando, USA.

3.1 GHz to 6GHz UWB Pulse radio transceiver front end based on super-regeneration approach
S. Anis, T. Ilnseher, R. Tielert, N. Wehn. In Proc. International Conference on Consumer Electronics (ICCE) 2008, January, 2008, Las Vegas, USA.

2007

Low Power Ultra-Wide-Bandpass Super-regenerative Filter
S. Anis, R. Tielert, N. Wehn. In Proc. 14th IEEE Symposium on Communications and Vehicular Technology in the Benelux (SCVT 2007), December, 2007, Delft Niederlande .

Analysis of Communication and Implementation Performance of FFT Based Carrier Synchronization of BPSK/QPSK Bursts
U. Wasenmüller, T. Brack, N. Wehn. Advances in Radio Science, Volume 6, pages 95-100, September, 2007, Miltenberg, Germany .

Designing Efficient Irregular Networks for Heterogeneous Systems-on-Chip
C. Neeb, N. Wehn. Journal of Systems Architecture (JSA), Volume 54, Issues 3-4, pages 384-396 , September, 2007.

Energy Consumption of Channel Decoders for OFDM-based UWB Systems
T. Lehnigk-Emden, C. Brehm, T. Brack, N. Wehn, F. Berens, C. Derdiyok. In Proc. 2007 IEEE International Conference on Ultra-Wideband (ICUWB 2007), pages 447-452, September, 2007, Singapore, Singapore.
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Implementation Issues of Turbo Synchronization with Duo-Binary Turbo Decoding
M. Alles, T. Lehnigk-Emden, U. Wasenmüller, N. Wehn. Invited paper, In Proc. 18th Annual IEEE International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC) 2007, September, 2007, Athens, Greece.
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XEEMU: An Improved XScale Power Simulator
Z. Herczeg, Á. Kiss, D. Schmidt, N. Wehn, T. Gyimóthy. In Proc. International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2007), September, 2007, Göteborg, Schweden.

Concepts for Autonomic Integrated Systems
W. Stechele, J. Zeppenfeld, A. Herkersdorf, O. Bringmann, R. Ernst, K. Hojenski, P. Janacik, F. Rammig, J. Teich, D. Ziener, N. Wehn. EDA Workshop 2007, pages 21-26, June, 2007, Hannover, Germany.

Evaluation of High Throughput Turbo-Decoder Architectures
M. May, C. Neeb, N. Wehn. In Proc. IEEE International Symposium on Circuits and Systems (ISCAS) 2007, pages 2770 - 2773, May, 2007, New Orleans, USA.
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A Survey on LDPC Codes and Decoders for OFDM-based UWB Systems
T. Brack, M. Alles, T. Lehnigk-Emden, F. Kienle, N. Wehn, F. Berens, A. Rüegg. In Proc. IEEE Vehicular Technology Conference (VTC), pages 1549 - 1553 , April, 2007, Dublin, Ireland.
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A Reliability-Aware LDPC Code Decoding Algorithm
M. Alles, T. Brack, N. Wehn. In Proc. 65th IEEE Vehicular Technology Conference (VTC2007-Spring), pages 1544 - 1548, April, 2007, Dublin, Ireland.
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Low Complexity LDPC Code Decoders for Next Generation Standards
T. Brack, M. Alles, T. Lehnigk-Emden, F. Kienle, N. Wehn, N. E. L'Insalata, F. Rossi, M. Rovini , L. Fanucci. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), April, 2007, Nice, France.
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2006

Energy Modelling in Sensor Networks
D. Schmidt, M. Krämer, T. Kuhn, N. Wehn. Advances in Radio Science, Volume 5, pages 347-351, November, 2006, Miltenberg, Germany.

Turbo-Codes vs. LDPC Codes (invited Talk)
F. Kienle, T. Lehnigk-Emden, T. Brack, M. Alles, T. Vogt, N. Wehn. Workshop on VLSI-Architectures for LDPC Decoders, October, 2006, Pisa, Italy.

A Reconfigurable Application Specific Instruction Set Processor for Viterbi and Log-MAP Decoding
T. Vogt, N. Wehn. In Proc. IEEE Workshop on Signal Processing (SIPS'06), pages 142-147, October, 2006, Banff, Canada.

Design of Irregular LDPC Codes for Flexible Encoder and Decoder Hardware Realizations
F. Kienle, T. Brack, N. Wehn. In Proc. 2006 International Conference on Software, Telecommunications and Computer Networks (SoftCOM), pages 296-300, October, 2006, Split, Dubrovnik, Croatia.

Front End Schaltung zur Online Auswertung von EKG Signalen
E. Zoghlami Ayari, R. Tielert. Advances in Radio Science, Volume 5, pages 197-204, September, 2006, Miltenberg, Deutschland.

Ambient Intelligence (invited Talk)
N. Wehn. 4th GMM Workshop "Energieautarke Sensorik", September, 2006, Karlsruhe, Germany.

A Synthesizable IP Core for WIMAX 802.16E LDPC Code Decoding
T. Brack, M. Alles, F. Kienle, N. Wehn. In Proc. 17th Annual IEEE International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC) 2006, September, 2006, Helsinki, Finland.

Enhanced Channel Coding for OFDM-based UWB Systems
T. Brack, F. Kienle, T. Lehnigk-Emden, M. Alles, N. Wehn, F. Berens. In Proc. IEEE International Conference on Ultra-Wideband (ICUWB), pages 255-260, September, 2006, Waltham, USA.

Designing Efficient Irregular Networks for Heterogeneous Systems-on-Chip
C. Neeb, N. Wehn. In Proc. IEEE 9th Euromicro Conference on Digital System Design (DSD) 2006, pages 665-672, August, 2006, Cavtat, Croatia.
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Channel Decoding in Software Defined Radio
N. Wehn. MPSoC 2006, August, 2006, Estes Park, Colorado, USA.

A Reconfigurable Multi-Processor Platform for Convolutional and Turbo Decoding
T. Vogt, C. Neeb, N. Wehn. In Proc. Reconfigurable Communication-centric SoCs (ReCoSoC) 2006, pages 16-23, August, 2006, Montpellier, France.
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Performance and Complexity Analysis of advanced Coding Schemes in the 4MORE Project
T. Lehnigk-Emden, T. Brack, M. Alles, N. Wehn, M. H. Hamon, P. Penard, R. Legouable, F. Berens. In Proc. 15th IST Mobile & Wireless Communications Summit, June, 2006, Myconos, Greece.
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Fast Convergence Algorithm for LDPC Codes
F. Kienle, T. Lehnigk-Emden, N. Wehn. In Proc. IEEE Vehicular Technology Conference (VTC), pages 2393-2397, May, 2006, Melbourne, Australia.

From Algorithm2Implementation: A Case Study in Wireless Communications (invited Talk)
N. Wehn. Infineon Tech Days "Signal Processing and Firmware", April, 2006, Munich, Germany.

A Reconfigurable Outer Modem Platform for Future Communications Systems
T. Vogt, C. Neeb, N. Wehn. In Proc. Dagstuhl Seminar "Dynamically Reconfigurable Architectures" 06141, April, 2006, Dagstuhl, Germany.

Advanced Channel Decoding Algorithms and Their Implementation for Future Communication Systems
N. Wehn. IEEE Annual Symposium on VLSI (invited keynote), March, 2006, Karlsruhe, Germany.

Disclosing the LDPC Code Decoder Design Space
T. Brack, F. Kienle, N. Wehn. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), pages 200-205, March, 2006, Munich, Germany.

Hardware/Software Tradeoffs for Advanced 3G Channel Decoding
D. Schmidt, N. Wehn. In Customizable Embedded Processors, pages 361-379, Morgan Kaufmann Publishers 2006, January, 2006, Elsevier, San Francisco, USA.

2005

Architecture-Driven Voltage Scaling for High-Throughput Turbo-Decoders
F. Gilbert, T. Vogt, N. Wehn. Journal of Embedded Computing, Vol. 1, Issue 3, pages 391-402, November, 2005.

From Algorithm to Implementation: A Case Study on Blind Carrier Synchronization
D. Schmidt, T. Brack, U. Wasenmüller, N. Wehn. Advances in Radio Science, Volume 4, pages 313-318, September, 2005, Miltenberg, Germany.

Energieminimierung von Basisbandsignalverarbeitungsalgorithmen auf programmierbaren Plattformen
C. Neeb, N. Wehn. Lecture Notes in Informatics (Informatik 2005), September, 2005, Bonn, Germany.

Bridging the Interleaving Bottleneck in Communication Applications for Efficient SoC Implementations
N. Wehn. MPSoC 2005, July, 2005, Margaux, France.

Implementation Trade-Offs of Advanced Channel Decoding for 3G and 4G Communication Systems (invited keynote)
N. Wehn. 2005 Reconfigurable Communication-Centric SoCs (invited keynote), June, 2005, Montpellier, France.

A Configurable IP Core for Combined Blind Frequency and Phase Synchronization of MPSK Bursts
T. Brack, U. Wasenmüller, N. Wehn. In Proc. 14th IST Mobile and Wireless Communications Summit, June, 2005, Dresden, Germany.
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Network-on-Chip-Centric Approach to Interleaving in High Throughput Channel Decoders
C. Neeb, M. Thul, N. Wehn. In Proc. IEEE International Symposium on Circuits and Systems (ISCAS) 2005, pages 1766-1769, May, 2005, Kobe, Japan.

Low Complexity Stopping Criterion for LDPC Code Decoders
F. Kienle, N. Wehn. In Proc. IEEE Vehicular Technology Conference (VTC), pages 606-609, May, 2005, Stockholm, Schweden.

Power Optimization in Advanced Channel Coding.
N. Wehn. Dagstuhl Seminar "Power Aware Computing Systems", Dagstuhl Seminar Proceedings 05141, April, 2005, Dagstuhl, Germany.

A Scalable System Architecture for High-Throughput Turbo-Decoders
M. Thul, F. Gilbert, T. Vogt, G. Kreiselmaier, N. Wehn. Journal of VLSI Signal Processing Vol. 39, pages 63-77, Springer Science and Business Media, April, 2005, Netherlands.

A synthesizable IP Core for DVB-S2 LDPC Code Decoding
F. Kienle, T. Brack, N. Wehn. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), pages 1530-1535, March, 2005, Munich, Germany. Distinguished with the "CMP Design Contest Award".
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2004

Engineering Complex SoCs
C. Rowen, N. Wehn, M. Baron, S. Leibson. International Symposium on System-on-Chips, Tutorial, October, 2004, Tampere, Finland.

Research Center "Ambient Intelligence" at the University of Kaierslautern
L. Litz, N. Wehn, B. Schürmann. VDE-Kongress 2004, volume 1, pages 19-24, October, 2004, Berlin, Germany.

Two-stage interleaving network analysis to design area- and energy-efficient 3GPP-compliant receiver architectures
A. Wellig. In Proc. IEEE Workshop on Signal Processing Systems (SIPS 2004), pages 65-70, October, 2004, Austin, Texas, USA.

Efficient Hardware Realization of IRA Code Decoders
F. Kienle, N. Wehn. In Proc. IEEE Workshop on Signal Processing Systems (SIPS), pages 286-291, October, 2004, Austin, Texas, USA.
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Design Space Exploration for Frequency Synchronization of BPSK/QPSK Bursts
U. Wasenmüller, T. Brack, D. Schmidt, N. Wehn. Advances in Radio Science, Volume 3, pages 337-341, October, 2004, Miltenberg, Germany.
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A Multi-Standard Channel-Decoder for Base-Station Applications
T. Vogt, N. Wehn, P. Alves. In Proc. 17th Symposium on Integrated Circuits and System Design 2004 (SBCCI '04), pages 192-197, September, 2004, Porto de Galinhas, Pernambuco, Brazil.

FPGA Implementation of Parallel Turbo Decoders
M. Thul, N. Wehn. In Proc. 17th Symposium on Integrated Circuits and System Design 2004 (SBCCI '04), pages 198-203, September, 2004, Porto de Galinhas, Pernambuco, Brazil.

Energy- and Area-Efficient Deinterleaving Architecture for High-Throughput Wireless Applications
A. Wellig, J. Zory, N. Wehn. 14th PATMOS Workshop - International Workshop on Power And Timing Modeling, Optimization and Simulation, September, 2004, Santorini, Greece.

Novel Optimum Reduced Search MLSE decoding algorithm enabling System-aware Power Savings
A. Wellig, J. Zory, N. Wehn. In Proc. IEEE Radio & Wireless Conference 2004 (RAWCON 2004), September, 2004, Atlanta, USA.

Network-Centric Approach for Parallel Decoder Architectures
N. Wehn. MPSoC 2004 (invited talk), July, 2004, Saint-Maximin la Sainte Baume, France.

Joint Graph-Decoder Design of IRA-Codes on Scalable Architectures
F. Kienle, N. Wehn. In Proc. IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), pages IV-673-676, May, 2004, Montreal, Canada.

Design Methodology for IRA Codes
F. Kienle, N. Wehn. In Proc. IEEE Asia South Pacific Design Automation Conference (ASP-DAC), pages 459-462, March, 2004, Yokohama, Japan.
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Channel Decoder Architecture for 3G Mobile Wireless Terminals
F. Berens, G. Kreiselmaier, N. Wehn. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), pages 192-197 (Designers Forum), February, 2004, Paris, France. Distinguished with the "CMP Design Contest Award".
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Chips of the Future: Soft, Crunchy or Hard?
P. Paulin, R. Bramley, A. Silburt, J. M. Balzano, K. van Berkel, N. Wehn. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), pages 844-849, February, 2004, Paris, France.

Advanced Architectures for High-Throughput Turbo-Decoders
F. Gilbert, F. Kienle, G. Kreiselmaier, M. Thul, T. Vogt, N. Wehn, F. Berens. ST Journal of System Research, Volume 1, Number 1, Wireless Communications, pages 81-95, February, 2004.

2003

Hardware-/Software Trade-Offs in Digital Communication Systems with Special Emphasis on Channel-Coding
N. Wehn. IT - Information Technology Journal 6/2003, pages 336-343, November, 2003.

Embedded Software for SoC
Edited by A. A. Jerraya, S. Yoo, D. Verkest and N. Wehn. Kluwer Academic Publishers 2003, ISBN 1-4020-7528-6., November, 2003.

A Survey on LDPC- and Turbo-Decoder Implementations
M. Thul, F. Kienle, N. Wehn. In Proc. International Conference on Software, Telecommunications and Computer Networks (SoftCOM), pages 122-126, October, 2003, Venice, Italy.

Framed Complexity Analysis in SystemC for Multi-level Design Space Exploration
A. Wellig, J. Zory. Euromicro Symposium on Digital System Design 2003 (DSD03), September, 2003, Belek, Turkey.
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Application driven Evaluation of Network on Chip Architectures for Parallel Signal Processing
C. Neeb, M. Thul, N. Wehn. Advances in Radio Science, Volume 2, pages 181-186, September, 2003, Miltenberg, Germany.
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Implementation Issues of Scalable LDPC-Decoders
F. Kienle, M. Thul, N. Wehn. In Proc. 3rd International Symposium on Turbo-Codes and Related Topics, pages 291-294, September, 2003, Brest, France.

SoC-Network for Interleaving in Wireless Communications
N. Wehn. Application-Specific Multi-Processor System On Chip (MPSOC 2003), July, 2003, Chamonix, France.

Architecture-Driven Voltage Scaling for High-Throughput Turbo-Decoders
F. Gilbert, N. Wehn. In Proc. 13th International Workshop Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, PATMOS 2003, June, 2003, Torino, Italy.
pages 379-388

Low Complexity Stopping Criteria for UMTS Turbo-Decoders
F. Gilbert, F. Kienle, N. Wehn. In Proc. IEEE Vehicular Technology Conference (VTC), pages 2376-2380, April, 2003, Jeju, Korea.
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Communication Centric Architectures for Turbo-Decoding on Embedded Multiprocessors
F. Gilbert, M. Thul, N. Wehn. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2003, Munich, Germany.
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VLSI-Implementation Issues of Turbo Trellis-Coded Modulation
F. Kienle, G. Kreiselmaier, N. Wehn. In Proc. IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), pages 633-636, March, 2003, Hongkong.
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Concurrent Interleaving Architectures for High-Throughput Channel Coding
M. Thul, F. Gilbert, N. Wehn. In Proc. IEEE International Conference on Acoustics, Speech, and Signal Processing 2003 (ICASSP '03), March, 2003, Hongkong.

2002

Efficient MAP-Algorithm Implementation on Programmable Architectures
F. Kienle, H. Michel, F. Gilbert, N. Wehn. Advances in Radio Science, Volume 1, pages 259-263, October, 2002, Miltenberg, Germany.
Volume 46

Hardware/Software Trade-Offs in Digital Communication Systems with Special Emphasis on Channel-Coding
N. Wehn. SoC-Design Workshop, October, 2002, Taiwan.
(invited talk)

Combined Turbo and Convolutional Decoder Architecture for UMTS Wireless Applications
G. Kreiselmaier, T. Vogt, N. Wehn, F. Berens. In Proc. 15th Symposium on Integrated Circuits and System Design 2002 (SBCCI '02), pages 337-342, September, 2002, Porto Alegre, Brazil.

A Scalable System Architecture for High-Throughput Turbo-Decoders
M. Thul, F. Gilbert, T. Vogt, G. Kreiselmaier, N. Wehn. In Proc. IEEE Workshop on Signal Processing Systems (SIPS 2002), pages 152-158, September, 2002, San Diego, USA.

Optimized Concurrent Interleaver Architecture for High-Speed Turbo-Decoding
M. Thul, F. Gilbert, N. Wehn. IEEE International Conference on Electronics, Circuits and Systems (ICECS), September, 2002, Dubrovnik, Croatia.
pages 1099-1102

Enabling High-Speed Turbo-Decoding through Concurrent Interleaving
M. Thul, N. Wehn, L. Rao. 2002 IEEE International Symposium on Circuits and Systems (ISCAS), May, 2002, Phoenix, USA.
pages 897-900

Evaluation of Algorithm Optimizations for Low-power Turbo-Decoder Implementations
M. Thul, T. Vogt, F. Gilbert, N. Wehn. In Proc. IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), pages 3101-3104, May, 2002, Orlando, Florida, USA.

Algorithmische Transformationen zur Reduktion des Leistungsverbrauchs in fortgeschrittenen Kanalcodierungsverfahren
F. Gilbert, H. Michel, N. Wehn. 3. Kolloquium des Schwerpunktprogramms der Deutschen Forschungsgemeinschaft VIVA, March, 2002, Chemnitz, Germany.
pages 84-92

Hardware/Software Trade-offs for Advanced 3G Channel Coding
H. Michel, A. Worm, M. Münch, N. Wehn. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2002, Paris, France.

2001

Algorithm Manipulation for Low-Power Communication Circuit Implementation
A. Worm, F. Gilbert, M. Thul, N. Wehn. Invited Talk SoC-Seminar 2001, November, 2001, Tampere Finland.

Voltage Scheduling Algorithms for UMTS Turbo-Code Decoding on Variable Supply Voltage Processors
F. Gilbert, N. Wehn. In Kleinheubacher Berichte, Band 45, pages 215-218, September, 2001, Kleinheubach, Germany.

Embedded DRAM Development: Technology, Physical Design, and Application Issues
D. Keitel-Schulz, N. Wehn. In IEEE Design & Test of Computers, pages 7-15, May, 2001.

Design of Low-Power High-Speed Maximum a Posteriori Architectures
A. Worm, H. Lamm, N. Wehn. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), pages 258-265, March, 2001, Munich, Germany.
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Turbo-Decoder Quantization for UMTS
H. Michel, N. Wehn. In IEEE Communications Letters, pages 55-57, February, 2001.
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Low Power Implementation of a Turbo-Decoder on Programmable Architectures
F. Gilbert, A. Worm, N. Wehn. In Proceedings of the Asia South Pacific Design Automation Conference (ASP-DAC) 2001, pages 400-403, January, 2001, Yokohama, Japan.
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Embedded Memories in System Design: Technology, Application, Design and Tools
D. Keitel-Schulz, N. Wehn, F. Catthoor, P. Panda, N. Dutt. Tutorial at the 14th International Conference on VLSI Design 2001, January, 2001, Bangalore, India.

VLSI Architectures for High-Speed MAP Decoders
A. Worm, H. Lamm, N. Wehn. In Proceedings of the 14th International Conference on VLSI Design 2001, pages 446-453, January, 2001, Bangalore, India.

2000

VLSI Architectures for Soft-Ouput Decoders
N. Wehn, H. Michel. In Proc. ITG Workshop 2000 "Mikroelektronik für die Informationstechnik", Vol. 162, pages 81-86, November, 2000, Darmstadt, Germany.

High-Speed MAP Architecture with Optimized Memory Size and Power Consumption
A. Worm, H. Lamm, N. Wehn. In Proc. IEEE Workshop of Signal Processing, 2000, pages 265-274, October, 2000.
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Advanced Implementation Issues of Turbo-Decoders
A. Worm, H. Michel, G. Kreiselmaier, M. Thul, N. Wehn. In Proc. 2nd International Symposium on Turbo-Codes and Related Topics, pages 351-354, September, 2000, Brest, France.
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Turbo-Decoding without SNR Estimation
A. Worm, P. Hoeher, N. Wehn. In IEEE Communications Letters, pages 193-195, June, 2000.
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Influence of Quantization on the Bit-Error Performance of Turbo-Decoders
H. Michel, A. Worm, N. Wehn. In Proceedings of the IEEE Vehicular Technology Conference (VTC) Spring 2000, pages 581-585, May, 2000, Tokyo, Japan.

Automating RT-Level Operand Isolation to Minimize Power Consumption
M. Münch, B. Wurth, R. Mehra, J. Sproch, N. Wehn. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), pages 624-631, May, 2000, Paris, France.
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Fault Tolerance and Corfigurability in DSM Coherence Protocols
D. Fleisch, H. Michel, S. Shah, O. Theel. In IEEE Concurrency Magazine, pages 10-21, April, 2000.

1999

Performance of Low Complexity Turbo-Codes in the UTRA-TDD-Mode
F. Berens, T. Bing, H. Michel, A. Worm, P. Baier. In Proceedings of the IEEE Vehicular Technology Fall 1999, pages 2621-2625, September, 1999, Amsterdam, The Netherlands.

Implementation Aspects of Turbo-Decoders for Future Radio Applications
F. Berens, A. Worm, H. Michel, N. Wehn. In Proceedings of the IEEE Vehicular Technology Conference (VTC) Fall 1999, pages 2601-2605, September, 1999, Amsterdam, The Netherlands.
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Low-Power Logic Styles: Branch-Based Logic Versus Topological Dual CMOS in Sub-Micron Technologies
U. Tohsche, S. Paul, N. Wehn. In Proceedings of the 8th International Symposium on Integrated Circuits, Devices and Systems, September, 1999, Singapore, Singapore.

Minimizing Power Consumption in Digital Circuits and Systems: an Overview
N. Wehn, M. Münch. In Kleinheubacher Berichte, Band 43, pages 308-319, September, 1999, Kleinheubach, Germany.
Invited Talk
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Power Minimization by Optimizing Data-Transfers in Turbo-Decoders
A. Worm, H. Michel, N. Wehn. In Kleinheubacher Berichte, Band 43, pages 343-350, September, 1999, Kleinheubach, Germany.
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1998

Issues in Embedded DRAM Development and Applications
D. Keitel-Schulz, N. Wehn. In Proceedings of the 11th International Symposium on System Synthesis, pages 23-28, December, 1998, Hsinchu, Taiwan.

Embedded DRAM Applications and Challenges
S. Hein, N. Wehn. Tutorial at the International Conference on Computer-Aided Design (ICCAD), November, 1998, San Jose, CA, USA.

Embedded DRAM Architectural Trade-Offs
N. Wehn, S. Hein. In Design, Automation and Test in Europe 1998, Proceedings, pages 704-708, February, 1998, Paris, France.