News

• Changes to lecture and exercise times are regularly published on the OpenOLAT web page of this course

Content

This course addresses the fundamentals of computer architecture with focus on RISC processors. We will discuss

• Data representation
  • Signed and unsigned fixed point numbers
  • Floating point numbers, IEEE 754 standard

• Computer arithmetic
  • Algorithms
  • Sequential and parallel hardware implementations

• Instruction set and machine language
  • Instruction set categories
  • Addressing modes
  • Assembler programming

• Datapath and control
  • Hardware implementation of a processor
  • Control unit design, microprogramming
  • Exceptions
• Instruction set parallelism
  • Pipelining
  • Superscalar and VLIW processors
  • Dynamic scheduling
• Memory hierarchy
  • Caches
  • Virtual memory, page tables, TLB

Exercise

The exercise sessions are tutored by M.Sc. Tobias Jauch.

Homework assignments can be downloaded through OpenOLAT (see above).

Literature

• Hennessy/Patterson: Computer Architecture - A Quantitative Approach, Morgan Kaufmann, 2017 (L INF 531)
• Hennessy/Patterson: Computer Architecture - A Quantitative Approach (MIPS Edition), Morgan Kaufmann, 2021, EIT 860/104.