Investigating Emerging Trends in Logic Circuit simulation with emphasis on interconnect modeling
Student: Mohamed Amine Riahi
Supervisor: Jan Lappas
Student: Mohamed Amine Riahi
Supervisor: Jan Lappas
Student: Akshay Laxman Powar
Supervisor: C. Weis
Student: Sayed Mohammad Tariful Azam
Supervisor: M. Hassani Sadi, C. Weis
Student: Taha Chiheb
Supervisor: J. Feldmann
Student: Sascha Maurice Dauber
Supervisor: C. Weis