Successive Cancellation Automorphism List Decoding of Polar Codes
L. Johannsen, C. Kestel, M. Geiselhart, T. Vogt, S. ten Brink, N. Wehn. International Symposium on Topics in Coding 2023 (ISTC 2023), September, 2023, Brest, France

Parallel Single Parity Check Nodes for High-Throughput Fast-SSCL Polar Code Decoders
L. Johannsen, C. Kestel, T. Vogt, N. Wehn. IEEE Symposium on Future Telecommunication Technologies (SOFTT), November, 2022, Johor Bahru, Malaysia.
Best Paper Award

Partial Order-Based Decoding of Rate-1 Nodes in Fast Simplified Successive-Cancellation List Decoders for Polar Codes
L. Johannsen, C. Kestel, O. Griebel, T. Vogt, N. Wehn. MDPI Electronics, Special Issue "VLSI Architectures for Wireless Communications and Digital Signal Processing", February, 2022.
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A 506 Gbit/s Polar Successive Cancellation List Decoder with CRC
C. Kestel, L. Johannsen, O. Griebel, J. Jimenez, T. Vogt, T. Lehnigk-Emden, N. Wehn. IEEE 31st PIMRC'20 - Workshop on Enabling Technologies for Terahertz Communications, September, 2020, virtual conference.

Architecture and Hardware Requirements for Turbo and LDPC decoders
F. Kienle, T. Brack, T. Vogt. Book chapter, Error Control Coding for B3G/4G Wireless Systems,WILEY, ISBN 978-0-470-77935-4, May, 2011.

FlexiChaP: A Dynamically Reconfigurable ASIP for Channel Decoding for Future Mobile Systems
M. Alles, T. Vogt, C. Brehm, N. Wehn. Published in: Dynamically Reconfigurable Systems (ISBN 978-90-481-3484-7), pages 293 - 314, DOI 10.1007/978-90-481-3485-4_14, March, 2010.

A Reconfigurable ASIP for Convolutional and Turbo Decoding in a SDR Environment
T. Vogt, N. Wehn. IEEE Transactions on Very Large Scale Integration Systems, Volume 16, Number 10, pages 1309-1320, October, 2008.

FlexiChaP: A Reconfigurable ASIP for Convolutional, Turbo, and LDPC Code Decoding
M. Alles, T. Vogt, N. Wehn. In Proc. IEEE 5th International Symposium on Turbo Codes & Related Topics, pages 84 - 89 , September, 2008, Lausanne, Schweiz.
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Proving Functional Correctness of Weakly Programmable IPs - A Case Study with Formal Property Checking
S. Loitz, M. Wedler, C. Brehm, T. Vogt, N. Wehn, W. Kunz. In Proc. IEEE Symposium on Application Specific Processors (SASP 2008), pages 48-54, June, 2008, Anaheim, California, USA.
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A Reconfigurable Application Specific Instruction Set Processor for Convolutional and Turbo Decoding in a SDR Environment
T. Vogt, N. Wehn. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2008, München, Deutschland.

Turbo-Codes vs. LDPC Codes (invited Talk)
F. Kienle, T. Lehnigk-Emden, T. Brack, M. Alles, T. Vogt, N. Wehn. Workshop on VLSI-Architectures for LDPC Decoders, October, 2006, Pisa, Italy.

A Reconfigurable Application Specific Instruction Set Processor for Viterbi and Log-MAP Decoding
T. Vogt, N. Wehn. In Proc. IEEE Workshop on Signal Processing (SIPS'06), pages 142-147, October, 2006, Banff, Canada.

A Reconfigurable Multi-Processor Platform for Convolutional and Turbo Decoding
T. Vogt, C. Neeb, N. Wehn. In Proc. Reconfigurable Communication-centric SoCs (ReCoSoC) 2006, pages 16-23, August, 2006, Montpellier, France.
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A Reconfigurable Outer Modem Platform for Future Communications Systems
T. Vogt, C. Neeb, N. Wehn. In Proc. Dagstuhl Seminar "Dynamically Reconfigurable Architectures" 06141, April, 2006, Dagstuhl, Germany.

Architecture-Driven Voltage Scaling for High-Throughput Turbo-Decoders
F. Gilbert, T. Vogt, N. Wehn. Journal of Embedded Computing, Vol. 1, Issue 3, pages 391-402, November, 2005.

A Scalable System Architecture for High-Throughput Turbo-Decoders
M. Thul, F. Gilbert, T. Vogt, G. Kreiselmaier, N. Wehn. Journal of VLSI Signal Processing Vol. 39, pages 63-77, Springer Science and Business Media, April, 2005, Netherlands.

A Multi-Standard Channel-Decoder for Base-Station Applications
T. Vogt, N. Wehn, P. Alves. In Proc. 17th Symposium on Integrated Circuits and System Design 2004 (SBCCI '04), pages 192-197, September, 2004, Porto de Galinhas, Pernambuco, Brazil.

Advanced Architectures for High-Throughput Turbo-Decoders
F. Gilbert, F. Kienle, G. Kreiselmaier, M. Thul, T. Vogt, N. Wehn, F. Berens. ST Journal of System Research, Volume 1, Number 1, Wireless Communications, pages 81-95, February, 2004.

Combined Turbo and Convolutional Decoder Architecture for UMTS Wireless Applications
G. Kreiselmaier, T. Vogt, N. Wehn, F. Berens. In Proc. 15th Symposium on Integrated Circuits and System Design 2002 (SBCCI '02), pages 337-342, September, 2002, Porto Alegre, Brazil.

A Scalable System Architecture for High-Throughput Turbo-Decoders
M. Thul, F. Gilbert, T. Vogt, G. Kreiselmaier, N. Wehn. In Proc. IEEE Workshop on Signal Processing Systems (SIPS 2002), pages 152-158, September, 2002, San Diego, USA.

Evaluation of Algorithm Optimizations for Low-power Turbo-Decoder Implementations
M. Thul, T. Vogt, F. Gilbert, N. Wehn. In Proc. IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), pages 3101-3104, May, 2002, Orlando, Florida, USA.