Mohammadreza Esmaeilpour Quchani, M.Sc.


Building 12, Room 251
67663 Kaiserslautern


Phone: (+49) 631 / 205-5918
Fax: (+49) 631 / 205-4437
Email: m.esmaeilpour(at)

Research Areas

  • Analog and Mixed-Signal Circuit Design
  • Delay-Locked Loop
  • Analog-to-Digital Converters


Enhanced LPDDR4X PHY in 12 nm FinFET
J. Feldmann, J. Lappas, M. Esmaeilpour, H. Abdo, C. Weis, N. WehnRISC-V Summit Europe, June, 2024, Munich, Germany.

A 5 Gb/s Low-Power Receiver with a Novel Data Sampling Method for LPDDR Interfaces
M. Esmaeilpour, J. Lappas, H. Abdo, C. Weis, N. Wehn. 22nd IEEE International NEWCAS Conference, June, 2024, Sherbrooke, Canada.