Mohammadreza Esmaeilpour Quchani, M.Sc.
Anschrift
Erwin-Schrödinger-Straße
Gebäude 12, Raum 251
67663 Kaiserslautern
Kontakt
Telefon: (+49) 631 / 205-5918
Fax: (+49) 631 / 205-4437
Email: m.esmaeilpour(at)rptu.de
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Forschungsgebiete
- Analog and Mixed-Signal Circuit Design
- Delay-Locked Loop
- Analog-to-Digital Converters
Publikationen
A Low-Power Linear Phase Interpolation-Based Delay Line in 12nm FinFET Technology
M. Esmaeilpour, J. Lappas, C. Weis, N. Wehn. 32nd IFIP/IEEE Conference on Very Large Scale Integration (VLSI-SoC 2024), October, 2024, Tanger, Morocco.
Enhanced LPDDR4X PHY in 12 nm FinFET
J. Feldmann, J. Lappas, M. Esmaeilpour, H. Abdo, C. Weis, N. Wehn. RISC-V Summit Europe, June, 2024, Munich, Germany.
A 5 Gb/s Low-Power Receiver with a Novel Data Sampling Method for LPDDR Interfaces
M. Esmaeilpour, J. Lappas, H. Abdo, C. Weis, N. Wehn. 22nd IEEE International NEWCAS Conference, June, 2024, Sherbrooke, Canada.