Microscaling-Stochastic Computing based Systolic Arrays for Energy Efficient Deep Neural Network Inference
M. Hassani Sadi, B. Hammoud, N. Wehn. IEEE Design, Automation and Test in Europe Conference (DATE), April 2026, Verona, Italy.

Efficient Deep Neural Network Training with a Novel 5.3-bit Block Floating Point Data Format
M. Hassani Sadi, C. Sudarshan, S. Nassif, N. Wehn. IEEE Transactions on Circuits and Systems for Artificial Intelligence.

Novel Adaptive Quantization Methodology for 8-bit Floating-Point DNN Training
M. Hassani Sadi, C. Sudarshan, N. Wehn. Design Automation for Embedded Systems, Springer Journal, Volume 28, pages 91–110, (2024)

A Critical Assessment of DRAM-PIM Architectures - Trends, Challenges and Solutions
C. Sudarshan, M. Hassani Sadi, L. Steiner, C. Weis, N. Wehn. International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XXII), July, 2022, Samos Island, Greece.

A Weighted Current Summation based Mixed Signal DRAM-PIM Architecture for Deep Neural Network Inference
C. Sudarshan, T. Soliman, J. Lappas, C. Weis, M. Hassani Sadi, M. Jung, A. Guntoro, N. Wehn. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Special Issue "Revolution of AI and Machine Learning with Processing-in-Memory (PIM): from Systems, Architectures, to Circuits", June, 2022.

Optimization of DRAM based PIM Architecture for Energy-Efficient Deep Neural Network Training
C. Sudarshan, M. Hassani Sadi, C. Weis, N. Wehn. IEEE International Symposium on Circuits and Systems (ISCAS), May, 2022, Austin, TX, USA.

FPGA-based Trainable Autoencoder for Communication Systems
J. Ney, S. Dörner, M. Herrmann, M. Hassani Sadi, J. Clausius, S. ten Brink, N. Wehn. ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, February, 2022, Virtual Conference.