Enhanced LPDDR4X PHY in 12 nm FinFET
J. Feldmann, J. Lappas, M. Esmaeilpour, H. Abdo, C. Weis, N. Wehn. RISC-V Summit Europe, June, 2024, Munich, Germany.

A Precise Measurement Platform for LPDDR4 Memories
J. Feldmann, L. Steiner, D. Christ, T. Psota, M. Jung, N. Wehn. ACM International Symposium on Memory Systems (MEMSYS 2023), Oktober, 2023, Alexandria, VA, USA

Efficient Hardware Implementation of Constant Time Sampling for HQC
M. Schöffel, J. Feldmann, N. Wehn. White Paper, September, 2023.
Link

Code-based Cryptography in IoT: A HW/SW Co-Design of HQC
M. Schöffel,J. Feldmann, N. Wehn. IEEE World Forum on Internet of Things, November, 2022, Yokohama, Japan.
Best Paper Award

Efficient Generation of Application Specific Memory Controllers
M. V. Natale, M. Jung, K. Kraft, F. Lauer, J. Feldmann, C. Sudarshan, C. Weis, S. O. Krumke, N. Wehn. ACM/IEEE International Symposium on Memory Systems (MEMSYS 2020), October, 2020, virtual conference.

A 22nm ASIC for Flexible Post-Quantum Cryptography
P. Karl, J. Schupp, D. Basu-Roy, M. Schöffel, J. Feldmann, N. Wehn, G. Sigl. Workshop on Topics in hArdware SEcurity and RISC-V (TASER), September, 2022, Leuven, Belgium.

Fast and Accurate DRAM Simulation: Can we Further Accelerate it?
J. Feldmann, M. Jung, K. Kraft, L. Steiner, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2020, Grenoble, France.
Nominated for Best Paper Award

Fast Simulation of DRAMs with Neural Networks
M. Jung, J. Feldmann, M. M. Ghaffar, N. Wehn. Talk at the 1st ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), September, 2019, Canmore, Alberta, Canada.